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Message-ID: <Hk03HDb6wSSHWtEFZHUye06HR0-9YzP5nCHx9A8_kHzWSZawDrU1o1pjEGkCOJFoRg0nTB4BWEv6V0XBOjF4-0Mj44lp2TrjaQfnytzp-Pk=@proton.me>
Date: Wed, 24 Jul 2024 19:06:01 +0000
From: Piotr Zalewski <pZ010001011111@...ton.me>
To: "airlied@...il.com" <airlied@...il.com>, "andy.yan@...k-chips.com" <andy.yan@...k-chips.com>, "daniel@...ll.ch" <daniel@...ll.ch>, "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>, "heiko@...ech.de" <heiko@...ech.de>, "hjc@...k-chips.com" <hjc@...k-chips.com>, "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "linux-rockchip@...ts.infradead.org" <linux-rockchip@...ts.infradead.org>, "maarten.lankhorst@...ux.intel.com" <maarten.lankhorst@...ux.intel.com>, "mripard@...nel.org" <mripard@...nel.org>, "tzimmermann@...e.de" <tzimmermann@...e.de>
Subject: [PATCH v2] rockchip/drm: vop2: add support for gamma LUT
Add support for gamma LUT in VOP2 driver. The implementation is based on
the one found in VOP driver and modified to be compatible with VOP2. Blue
and red channels in gamma LUT register write were swapped with respect to
how gamma LUT values are written in VOP. Write of the current video port id
to VOP2_SYS_LUT_PORT_SEL register was added before the write of DSP_LUT_EN
bit. Gamma size is set and drm color management is enabled for each video
port's CRTC except ones which have no associated device. Tested on RK3566
(Pinetab2).
Helped-by: Dragan Simic <dsimic@...jaro.org>
Signed-off-by: Piotr Zalewski <pZ010001011111@...ton.me>
---
Notes:
Changes in v2:
- Apply code styling corrections [1]
- Move gamma LUT write inside the vop2 lock
Link to v1: https://lore.kernel.org/linux-rockchip/9736eadf6a9d8e97eef919c6b3d88828@manjaro.org/T/#t
[1] https://lore.kernel.org/linux-rockchip/d019761504b540600d9fc7a585d6f95f@manjaro.org/
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index 16abdc4a59a8..37fcf544a5fd 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -1515,9 +1515,8 @@ static void vop2_vp_dsp_lut_disable(struct vop2_video_port *vp)
static void vop2_crtc_write_gamma_lut(struct vop2 *vop2, struct drm_crtc *crtc)
{
- const struct vop2_data *vop2_data = vop2->data;
const struct vop2_video_port *vp = to_vop2_video_port(crtc);
- const struct vop2_video_port_data *vp_data = &vop2_data->vp[vp->id];
+ const struct vop2_video_port_data *vp_data = &vop2->data->vp[vp->id];
struct drm_color_lut *lut = crtc->state->gamma_lut->data;
unsigned int i, bpc = ilog2(vp_data->gamma_lut_len);
@@ -1558,9 +1557,8 @@ static void vop2_crtc_gamma_set(struct vop2 *vop2, struct drm_crtc *crtc,
* In order to write the LUT to the internal memory,
* we need to first make sure the dsp_lut_en bit is cleared.
*/
- ret =
- readx_poll_timeout(vop2_vp_dsp_lut_is_enabled, vp, dsp_ctrl, !dsp_ctrl, 5,
- 30 * 1000);
+ ret = readx_poll_timeout(vop2_vp_dsp_lut_is_enabled, vp, dsp_ctrl,
+ !dsp_ctrl, 5, 30 * 1000);
if (ret) {
DRM_DEV_ERROR(vop2->dev, "display LUT RAM enable timeout!\n");
@@ -1571,9 +1569,9 @@ static void vop2_crtc_gamma_set(struct vop2 *vop2, struct drm_crtc *crtc,
return;
}
- vop2_crtc_write_gamma_lut(vop2, crtc);
vop2_lock(vop2);
+ vop2_crtc_write_gamma_lut(vop2, crtc);
vop2_writel(vp->vop2, RK3568_LUT_PORT_SEL, vp->id);
vop2_vp_dsp_lut_enable(vp);
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