linux-kernel - RE: [PATCH v4 2/4] arm64: dts: exynos: add initial CMU clock nodes in ExynosAuto v920

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Message-ID: <03bd01dade40$218e7b70$64ab7250$@samsung.com>
Date: Thu, 25 Jul 2024 12:09:58 +0900
From: "sunyeal.hong" <sunyeal.hong@...sung.com>
To: "'Tudor Ambarus'" <tudor.ambarus@...aro.org>, "'Krzysztof Kozlowski'"
	<krzk@...nel.org>, "'Sylwester Nawrocki'" <s.nawrocki@...sung.com>,
	"'Chanwoo Choi'" <cw00.choi@...sung.com>, "'Alim Akhtar'"
	<alim.akhtar@...sung.com>, "'Michael	Turquette'" <mturquette@...libre.com>,
	"'Stephen Boyd'" <sboyd@...nel.org>, "'Rob	Herring'" <robh@...nel.org>,
	"'Conor Dooley'" <conor+dt@...nel.org>
Cc: <linux-samsung-soc@...r.kernel.org>, <linux-clk@...r.kernel.org>,
	<devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v4 2/4] arm64: dts: exynos: add initial CMU clock nodes
 in ExynosAuto v920

Hello Tudor,

> -----Original Message-----
> From: Tudor Ambarus <tudor.ambarus@...aro.org>
> Sent: Wednesday, July 24, 2024 8:18 PM
> To: Sunyeal Hong <sunyeal.hong@...sung.com>; Krzysztof Kozlowski
> <krzk@...nel.org>; Sylwester Nawrocki <s.nawrocki@...sung.com>; Chanwoo
> Choi <cw00.choi@...sung.com>; Alim Akhtar <alim.akhtar@...sung.com>;
> Michael Turquette <mturquette@...libre.com>; Stephen Boyd
> <sboyd@...nel.org>; Rob Herring <robh@...nel.org>; Conor Dooley
> <conor+dt@...nel.org>
> Cc: linux-samsung-soc@...r.kernel.org; linux-clk@...r.kernel.org;
> devicetree@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org
> Subject: Re: [PATCH v4 2/4] arm64: dts: exynos: add initial CMU clock
> nodes in ExynosAuto v920
> 
> Hi, Sunyeal,
> 
> I quickly skimmed over the series and I fail to see where/how the HW auto
> clock gating is enabled/configured. Would you please add more details on
> how this works?
>
The HW auto clock gating function is activated in the bootloader stage. So we don't have to control it in the kernel.

> On 7/22/24 11:33 PM, Sunyeal Hong wrote:
> > Add cmu_top, cmu_peric0 clock nodes and switch USI clocks instead of
> > dummy fixed-rate-clock.
> >
> > Signed-off-by: Sunyeal Hong <sunyeal.hong@...sung.com>
> > ---
> >  .../arm64/boot/dts/exynos/exynosautov920.dtsi | 40
> > +++++++++++++------
> >  1 file changed, 27 insertions(+), 13 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > index c1c8566d74f5..54fc32074379 100644
> > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> 
> 
> cut
> 
> > @@ -224,7 +237,8 @@ serial_0: serial@...80000 {
> >  				interrupts = <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH>;
> >  				pinctrl-names = "default";
> >  				pinctrl-0 = <&uart0_bus>;
> > -				clocks = <&clock_usi>, <&clock_usi>;
> > +				clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>,
> 
> isn't this MUX common to multiple GATEs? Wouldn't turning it off affect
> other users than the serial?
> 
> Thanks,
> ta
> 
I don’t think there will be any problems you are worried about through the enable count of CCF.

Thanks,
Sunyeal Hong.
> > +					 <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>;
> >  				clock-names = "uart", "clk_uart_baud0";
> >  				samsung,uart-fifosize = <256>;
> >  				status = "disabled";