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Message-ID: <mhng-28424e23-c9b4-407e-97d8-9dbb09101781@palmer-ri-x1c9>
Date: Wed, 24 Jul 2024 20:23:27 -0700 (PDT)
From: Palmer Dabbelt <palmer@...belt.com>
To: Charlie Jenkins <charlie@...osinc.com>
CC: Conor Dooley <conor@...nel.org>, robh@...nel.org, krzk+dt@...nel.org,
Paul Walmsley <paul.walmsley@...ive.com>, aou@...s.berkeley.edu, jszhang@...nel.org, wens@...e.org,
jernej.skrabec@...il.com, samuel@...lland.org, samuel.holland@...ive.com, corbet@....net,
shuah@...nel.org, guoren@...nel.org, Evan Green <evan@...osinc.com>, andy.chiu@...ive.com,
jrtc27@...c27.com, ajones@...tanamicro.com, linux-riscv@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-sunxi@...ts.linux.dev,
linux-doc@...r.kernel.org, linux-kselftest@...r.kernel.org, Charlie Jenkins <charlie@...osinc.com>,
Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v7 09/13] riscv: vector: Support xtheadvector save/restore
On Wed, 24 Jul 2024 12:14:00 PDT (-0700), Charlie Jenkins wrote:
> Use alternatives to add support for xtheadvector vector save/restore
> routines.
>
> Signed-off-by: Charlie Jenkins <charlie@...osinc.com>
> Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
b4 isn't applying this, either on top of your last patch set or rc1 --
the base commit in the header isn't a hash I have, so I'm not sure where
it's mean to apply to.
Also...
> ---
> arch/riscv/include/asm/csr.h | 6 +
> arch/riscv/include/asm/switch_to.h | 2 +-
> arch/riscv/include/asm/vector.h | 225 +++++++++++++++++++++++++--------
> arch/riscv/kernel/cpufeature.c | 5 +-
> arch/riscv/kernel/kernel_mode_vector.c | 8 +-
> arch/riscv/kernel/process.c | 4 +-
> arch/riscv/kernel/signal.c | 6 +-
> arch/riscv/kernel/vector.c | 12 +-
> 8 files changed, 198 insertions(+), 70 deletions(-)
[...]
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index bf25215bad24..cb48092fdc5d 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -845,10 +845,7 @@ static int __init riscv_fill_hwcap_from_ext_list(unsigned long *isa2hwcap)
> riscv_isa_set_ext(ext, source_isa);
> }
>
> -<<<<<<< HEAD
> riscv_resolve_isa(source_isa, isainfo->isa, &this_hwcap, isa2hwcap);
> -=======
> ->>>>>>> 0f260ac829ca (riscv: Extend cpufeature.c to detect vendor extensions)
> riscv_fill_cpu_vendor_ext(cpu_node, cpu);
>
> of_node_put(cpu_node);
This chunk isn't applying, and it's got a conflict marker in there. So
I think that means something's gone off the rails?
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