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Message-ID: <20240725044812.GI2317@thinkpad>
Date: Thu, 25 Jul 2024 10:18:12 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Jim Quinlan <james.quinlan@...adcom.com>
Cc: linux-pci@...r.kernel.org, Nicolas Saenz Julienne <nsaenz@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Cyril Brulebois <kibi@...ian.org>,
Stanimir Varbanov <svarbanov@...e.de>,
Krzysztof Kozlowski <krzk@...nel.org>,
bcm-kernel-feedback-list@...adcom.com, jim2101024@...il.com,
Florian Fainelli <florian.fainelli@...adcom.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" <linux-rpi-kernel@...ts.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" <linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 08/12] PCI: brcmstb: Don't conflate the reset rescal
with phy ctrl
On Tue, Jul 16, 2024 at 05:31:23PM -0400, Jim Quinlan wrote:
> We've been assuming that if an SOC has a "rescal" reset controller that we
> should automatically invoke brcm_phy_cntl(...). This will not be true in
> future SOCs, so we create a bool "has_phy" and adjust the cfg_data
> appropriately (we need to give 7216 its own cfg_data structure instead of
> sharing one).
>
In all commit messages, use imperative tone as per kernel documentation:
"Describe your changes in imperative mood, e.g. "make xyzzy do frotz"
instead of "[This patch] makes xyzzy do frotz" or "[I] changed xyzzy
to do frotz", as if you are giving orders to the codebase to change
its behaviour."
> Signed-off-by: Jim Quinlan <james.quinlan@...adcom.com>
> Reviewed-by: Stanimir Varbanov <svarbanov@...e.de>
> Reviewed-by: Florian Fainelli <florian.fainelli@...adcom.com>
> ---
> drivers/pci/controller/pcie-brcmstb.c | 17 ++++++++++++++---
> 1 file changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> index dfb404748ad8..8ab5a8ca05b4 100644
> --- a/drivers/pci/controller/pcie-brcmstb.c
> +++ b/drivers/pci/controller/pcie-brcmstb.c
> @@ -222,6 +222,7 @@ enum pcie_type {
> struct pcie_cfg_data {
> const int *offsets;
> const enum pcie_type type;
> + const bool has_phy;
'has_phy' means the controller supports PHY and the new SoC doesn't have a PHY
for the controller?
- Mani
--
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