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Message-ID: <c9e6b86e359ee46ad686a60acc36430c3ac61275.camel@intel.com>
Date: Fri, 26 Jul 2024 06:54:15 +0000
From: "Zhang, Rui" <rui.zhang@...el.com>
To: "kai.heng.feng@...onical.com" <kai.heng.feng@...onical.com>,
"jacob.jun.pan@...ux.intel.com" <jacob.jun.pan@...ux.intel.com>,
"lenb@...nel.org" <lenb@...nel.org>, "Wysocki, Rafael J"
<rafael.j.wysocki@...el.com>
CC: "linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
"artem.bityutskiy@...ux.intel.com" <artem.bityutskiy@...ux.intel.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] intel_idle: Add Jasper Lake and Elkhart Lake support
BTW, Add Rafael.
On Fri, 2024-07-26 at 14:51 +0800, Zhang, Rui wrote:
> On Fri, 2024-07-26 at 14:26 +0800, Kai-Heng Feng wrote:
> > Without proper C-state support, the CPU can take long time to exit
> > to
> > C0
> > to handle IRQ and perform DMA.
>
> Can you provide more details?
>
> Say, what cstate is entered w/ and w/o this patch?
>
> can you show the output of "grep .
> /sys/devices/system/cpu/cpu0/cpuidle/state*/*" without this patch?
>
> >
> > The data collect via wult shows the latency is similar to Broxton,
> > so
> > use the existing table to support C-state on JSL and EHL.
>
> so you have done cstate measurement on the EHL using wult?
> can you share more details about the measurement results?
>
> thanks,
> rui
>
> >
> > Link: https://bugzilla.kernel.org/show_bug.cgi?id=219023
> > Signed-off-by: Kai-Heng Feng <kai.heng.feng@...onical.com>
> > ---
> > drivers/idle/intel_idle.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
> > index 9aab7abc2ae9..eb6975a1d083 100644
> > --- a/drivers/idle/intel_idle.c
> > +++ b/drivers/idle/intel_idle.c
> > @@ -1538,6 +1538,8 @@ static const struct x86_cpu_id
> > intel_idle_ids[]
> > __initconst = {
> > X86_MATCH_VFM(INTEL_ATOM_GOLDMONT, &idle_cpu_bxt),
> > X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_PLUS, &idle_cpu_bxt),
> > X86_MATCH_VFM(INTEL_ATOM_GOLDMONT_D, &idle_cpu_dnv),
> > + X86_MATCH_VFM(INTEL_ATOM_TREMONT, &idle_cpu_bxt),
> > + X86_MATCH_VFM(INTEL_ATOM_TREMONT_L, &idle_cpu_bxt),
> > X86_MATCH_VFM(INTEL_ATOM_TREMONT_D, &idle_cpu_snr),
> > X86_MATCH_VFM(INTEL_ATOM_CRESTMONT, &idle_cpu_grr),
> > X86_MATCH_VFM(INTEL_ATOM_CRESTMONT_X, &idle_cpu_srf),
>
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