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Message-ID: <ZqO3gPcCCVh1r5WM@x1>
Date: Fri, 26 Jul 2024 11:49:36 -0300
From: Arnaldo Carvalho de Melo <acme@...nel.org>
To: Suzuki K Poulose <suzuki.poulose@....com>
Cc: James Clark <james.clark@...aro.org>, coresight@...ts.linaro.org,
	gankulkarni@...amperecomputing.com, mike.leach@...aro.org,
	leo.yan@...ux.dev, anshuman.khandual@....com,
	James Clark <james.clark@....com>,
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	John Garry <john.g.garry@...cle.com>, Will Deacon <will@...nel.org>,
	Peter Zijlstra <peterz@...radead.org>,
	Ingo Molnar <mingo@...hat.com>, Namhyung Kim <namhyung@...nel.org>,
	Mark Rutland <mark.rutland@....com>, Jiri Olsa <jolsa@...nel.org>,
	Ian Rogers <irogers@...gle.com>,
	Adrian Hunter <adrian.hunter@...el.com>,
	"Liang, Kan" <kan.liang@...ux.intel.com>,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-perf-users@...r.kernel.org
Subject: Re: [PATCH v6 00/17] coresight: Use per-sink trace ID maps for Perf
 sessions

On Fri, Jul 26, 2024 at 03:38:13PM +0100, Suzuki K Poulose wrote:
> On 26/07/2024 15:32, Arnaldo Carvalho de Melo wrote:
> > On Fri, Jul 26, 2024 at 03:26:04PM +0100, Suzuki K Poulose wrote:
> > > On 26/07/2024 15:18, Arnaldo Carvalho de Melo wrote:
> > > > On Mon, Jul 22, 2024 at 11:11:42AM +0100, James Clark wrote:
> > > > > This will allow sessions with more than CORESIGHT_TRACE_IDS_MAX ETMs
> > > > > as long as there are fewer than that many ETMs connected to each sink.
> > > > 
> > > > Hey, may I take the tools part, i.e. patches 0-7 and someone on the ARM
> > > > kernel team pick the driver bits?

> > > I plan to pick the kernel driver bits for v6.12

> > Perhaps it is better for me to wait for that?

> Yes, please.

Please let me know when you do so so that I can merge the tooling bits.

Thanks,

- Arnaldo

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