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Message-ID: <CAMuHMdXUWqtPwKV1-yqogJ8K552fHgveZRHh0W9Xqh37J3FbKA@mail.gmail.com>
Date: Fri, 26 Jul 2024 17:09:49 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org, 
	linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v2 2/2] clk: renesas: rzg2l-cpg: Refactor to use priv for
 clks and base in clock register functions

On Mon, Jul 15, 2024 at 12:37 PM Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Simplify the `rzg2l-cpg` driver by removing explicit passing of `clks` and
> `base` parameters in various clock registration functions. These values
> are now accessed directly from the `priv` structure.
>
> While at it, drop masking of parent clocks with 0xffff as nothing is ever
> stored in the high bits.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> v1->v2
> - Squashed patches (2,3,4)/4 into single patch
> - Dropped masking of parent clock with 0xffff
> - Dropped creating local variable clks

Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-clk for v6.12.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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