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Message-ID: <6ae6dda5-1e49-4ed1-8748-b086ad4008a4@quicinc.com>
Date: Fri, 26 Jul 2024 11:38:50 -0700
From: Jessica Zhang <quic_jesszhan@...cinc.com>
To: Zhaoxiong Lv <lvzhaoxiong@...qin.corp-partner.google.com>,
<neil.armstrong@...aro.org>, <maarten.lankhorst@...ux.intel.com>,
<mripard@...nel.org>, <tzimmermann@...e.de>, <dianders@...omium.org>,
<hsinyi@...gle.com>, <airlied@...il.com>, <daniel@...ll.ch>,
<jagan@...eble.ai>
CC: <dri-devel@...ts.freedesktop.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 2/2] drm/panel: jd9365da: Modify the init code of
Melfas
On 7/25/2024 1:32 AM, Zhaoxiong Lv wrote:
> Modify the Melfas panel init code to satisfy the gamma
> value of 2.2
>
> Signed-off-by: Zhaoxiong Lv <lvzhaoxiong@...qin.corp-partner.google.com>
Hi Zhaoxiong,
Acked-by: Jessica Zhang <quic_jesszhan@...cinc.com>
Thanks,
Jessica Zhang
> ---
> .../gpu/drm/panel/panel-jadard-jd9365da-h3.c | 78 +++++++++----------
> 1 file changed, 39 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
> index ce73e8cb1db5..44897e5218a6 100644
> --- a/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
> +++ b/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c
> @@ -873,22 +873,22 @@ static int melfas_lmfbx101117480_init_cmds(struct jadard *jadard)
> jd9365da_switch_page(&dsi_ctx, 0x01);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xbf);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xd7);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x01);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xbf);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x00);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xd7);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x01);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x70);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x2d);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x2d);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x7e);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfe);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfd);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x28);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x12);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x78);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x7e);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x7f);
> @@ -899,47 +899,47 @@ static int melfas_lmfbx101117480_init_cmds(struct jadard *jadard)
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x01);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x8e);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x6a);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x09);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x2e);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x1a);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x15);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x7f);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x69);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x59);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x4e);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x4c);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x40);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x45);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x30);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x4a);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x49);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x4a);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x68);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x57);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x5b);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x4e);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x49);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x73);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x56);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x43);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x38);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x36);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x28);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x2f);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x19);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x32);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x31);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x31);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x4f);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x3e);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x47);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x36);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x31);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x24);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x12);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7f);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x69);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x59);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x4e);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x4c);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x40);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x45);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x30);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x4a);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x49);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x4a);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x68);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x57);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x5b);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x4e);
> - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x49);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x73);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x56);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x43);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x38);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x36);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x28);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x2f);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x19);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x32);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x31);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x31);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x4f);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x3e);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x47);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x36);
> + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x31);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x24);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x12);
> mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x02);
> --
> 2.17.1
>
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