linux-kernel - [PATCH] mtd: spi-nor: micron-st: Add n25q064a WP support

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Message-ID: <20240726185825.142733-1-computersforpeace@gmail.com>
Date: Fri, 26 Jul 2024 11:58:18 -0700
From: Brian Norris <computersforpeace@...il.com>
To: linux-mtd@...ts.infradead.org
Cc: Brian Norris <computersforpeace@...il.com>,
	Michael Walle <mwalle@...nel.org>,
	Miquel Raynal <miquel.raynal@...tlin.com>,
	Pratyush Yadav <pratyush@...nel.org>,
	Richard Weinberger <richard@....at>,
	Tudor Ambarus <tudor.ambarus@...aro.org>,
	Vignesh Raghavendra <vigneshr@...com>,
	linux-kernel@...r.kernel.org
Subject: [PATCH] mtd: spi-nor: micron-st: Add n25q064a WP support

These flash chips are used on Google / TP-Link / ASUS OnHub devices, and
OnHub devices are write-protected by default (same as any other
ChromeOS/Chromebook system). I've referred to datasheets, and tested on
OnHub devices.

Signed-off-by: Brian Norris <computersforpeace@...il.com>
---

 drivers/mtd/spi-nor/micron-st.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index 3c6499fdb712..e6bab2d00c92 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -436,6 +436,8 @@ static const struct flash_info st_nor_parts[] = {
 		.id = SNOR_ID(0x20, 0xbb, 0x17),
 		.name = "n25q064a",
 		.size = SZ_8M,
+		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+			 SPI_NOR_BP3_SR_BIT6,
 		.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
 	}, {
 		.id = SNOR_ID(0x20, 0xbb, 0x18),
-- 
2.43.0