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Message-ID: <mhng-d1533559-79a3-401a-8eee-a743b80b3bb2@palmer-ri-x1c9>
Date: Sat, 27 Jul 2024 06:29:14 -0700 (PDT)
From: Palmer Dabbelt <palmer@...osinc.com>
To: Linus Torvalds <torvalds@...ux-foundation.org>
CC: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [GIT PULL] RISC-V Patches for the 6.11 Merge Window, Part 2
merged tag 'riscv-for-linus-6.11-mw1'
The following changes since commit f557af081de6b45a25e27d633b4d8d2dbc2f428e:
Merge tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (2024-07-20 09:11:27 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.11-mw2
for you to fetch changes up to 52420e483d3e1562f11a208d3c540b27b5e5dbf4:
RISC-V: Provide the frequency of time CSR via hwprobe (2024-07-26 05:50:51 -0700)
----------------------------------------------------------------
RISC-V Patches for the 6.11 Merge Window, Part 2
* Support for NUMA (via SRAT and SLIT), console output (via SPCR), and
cache info (via PPTT) on ACPI-based systems.
* The trap entry/exit code no longer breaks the return address stack
predictor on many systems, which results in an improvement to trap
latency.
* Support for HAVE_ARCH_STACKLEAK.
* The sv39 linear map has been extended to support 128GiB mappings.
* The frequency of the mtime CSR is now visible via hwprobe.
----------------------------------------------------------------
Sorry this one's late again, I'd accidentally picked up a patch that went
through another tree and didn't notice until yesterday morning. There should
be no post-merge code chages, but I wanted to give it a day for the testers
just in case.
----------------------------------------------------------------
Anton Blanchard (1):
riscv: Improve exception and system call latency
Charlie Jenkins (4):
riscv: Extend cpufeature.c to detect vendor extensions
riscv: Add vendor extensions to /proc/cpuinfo
riscv: Introduce vendor variants of extension helpers
riscv: cpufeature: Extract common elements from extension checking
Conor Dooley (2):
RISC-V: hwprobe: sort EXT_KEY()s in hwprobe_isa_ext0() alphabetically
RISC-V: run savedefconfig for defconfig
Haibo Xu (4):
ACPI: RISCV: Add NUMA support based on SRAT and SLIT
ACPI: NUMA: Add handler for SRAT RINTC affinity structure
ACPI: NUMA: change the ACPI_NUMA to a hidden option
ACPI: NUMA: replace pr_info with pr_debug in arch_acpi_numa_init
Jinjie Ruan (1):
trace: riscv: Remove deprecated kprobe on ftrace support
Jisheng Zhang (2):
riscv: boot: remove duplicated targets line
riscv: enable HAVE_ARCH_STACKLEAK
Palmer Dabbelt (5):
Merge patch series "Add ACPI NUMA support for RISC-V"
Merge patch series "riscv: Separate vendor extensions from standard extensions"
Merge patch "Enable SPCR table for console output on RISC-V"
Merge patch series "RISC-V: Select ACPI PPTT drivers"
RISC-V: Provide the frequency of time CSR via hwprobe
Sia Jee Heng (1):
RISC-V: ACPI: Enable SPCR table for console output on RISC-V
Stuart Menefy (1):
riscv: Extend sv39 linear mapping max size to 128G
Yunhui Cui (3):
riscv: cacheinfo: remove the useless input parameter (node) of ci_leaf_init()
riscv: cacheinfo: initialize cacheinfo's level and type from ACPI PPTT
RISC-V: Select ACPI PPTT drivers
Zhongqiu Han (1):
riscv: signal: Remove unlikely() from WARN_ON() condition
Documentation/arch/riscv/hwprobe.rst | 2 +
Documentation/arch/riscv/vm-layout.rst | 11 +-
arch/arm64/Kconfig | 1 -
arch/loongarch/Kconfig | 1 -
arch/riscv/Kconfig | 6 +-
arch/riscv/Kconfig.vendor | 19 +++
arch/riscv/boot/Makefile | 1 -
arch/riscv/configs/defconfig | 26 ++---
arch/riscv/errata/andes/errata.c | 3 +
arch/riscv/errata/sifive/errata.c | 3 +
arch/riscv/errata/thead/errata.c | 3 +
arch/riscv/include/asm/acpi.h | 15 ++-
arch/riscv/include/asm/cpufeature.h | 103 ++++++++++------
arch/riscv/include/asm/hwcap.h | 25 ++--
arch/riscv/include/asm/hwprobe.h | 2 +-
arch/riscv/include/asm/page.h | 2 +-
arch/riscv/include/asm/thread_info.h | 1 +
arch/riscv/include/asm/vendor_extensions.h | 104 +++++++++++++++++
arch/riscv/include/asm/vendor_extensions/andes.h | 19 +++
arch/riscv/include/uapi/asm/hwprobe.h | 1 +
arch/riscv/kernel/Makefile | 3 +
arch/riscv/kernel/acpi.c | 17 ++-
arch/riscv/kernel/acpi_numa.c | 131 +++++++++++++++++++++
arch/riscv/kernel/cacheinfo.c | 35 ++++--
arch/riscv/kernel/cpu.c | 35 +++++-
arch/riscv/kernel/cpufeature.c | 143 ++++++++++++++++-------
arch/riscv/kernel/entry.S | 21 ++--
arch/riscv/kernel/probes/Makefile | 1 -
arch/riscv/kernel/probes/ftrace.c | 65 -----------
arch/riscv/kernel/setup.c | 4 +-
arch/riscv/kernel/signal.c | 2 +-
arch/riscv/kernel/smpboot.c | 2 -
arch/riscv/kernel/stacktrace.c | 4 +-
arch/riscv/kernel/sys_hwprobe.c | 48 ++++----
arch/riscv/kernel/vendor_extensions.c | 56 +++++++++
arch/riscv/kernel/vendor_extensions/Makefile | 3 +
arch/riscv/kernel/vendor_extensions/andes.c | 18 +++
drivers/acpi/numa/Kconfig | 5 +-
drivers/acpi/numa/srat.c | 32 ++++-
drivers/base/arch_numa.c | 2 +-
drivers/firmware/efi/libstub/Makefile | 3 +-
drivers/perf/riscv_pmu_sbi.c | 11 +-
include/linux/acpi.h | 6 +
43 files changed, 750 insertions(+), 245 deletions(-)
create mode 100644 arch/riscv/Kconfig.vendor
create mode 100644 arch/riscv/include/asm/vendor_extensions.h
create mode 100644 arch/riscv/include/asm/vendor_extensions/andes.h
create mode 100644 arch/riscv/kernel/acpi_numa.c
delete mode 100644 arch/riscv/kernel/probes/ftrace.c
create mode 100644 arch/riscv/kernel/vendor_extensions.c
create mode 100644 arch/riscv/kernel/vendor_extensions/Makefile
create mode 100644 arch/riscv/kernel/vendor_extensions/andes.c
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