lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <87o76jt0ps.ffs@tglx>
Date: Sat, 27 Jul 2024 15:37:35 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: ysionneau@...rayinc.com, linux-kernel@...r.kernel.org
Cc: Jonathan Borne <jborne@...rayinc.com>, Julian Vetter
 <jvetter@...rayinc.com>, Yann Sionneau <ysionneau@...rayinc.com>, Clement
 Leger <clement@...ment-leger.fr>, Vincent Chardon
 <vincent.chardon@...ys-design.com>, Jules Maselbas <jmaselbas@...v.net>
Subject: Re: [RFC PATCH v3 22/37] irqchip: Add kvx-core-intc core interrupt
 controller driver

On Mon, Jul 22 2024 at 11:41, ysionneau@...rayinc.com wrote:
> +static int __init
> +kvx_init_core_intc(struct device_node *intc, struct device_node *parent)
> +{
> +	uint32_t core_nr_irqs;
> +	unsigned long cpuid;
> +	int ret;
> +
> +	ret = kvx_of_parent_cpuid(intc, &cpuid);
> +	if (ret)
> +		panic("core intc has no CPU parent\n");
> +
> +	if (smp_processor_id() != cpuid) {
> +		fwnode_dev_initialized(of_fwnode_handle(intc), true);
> +		return 0;
> +	}
> +
> +	if (of_property_read_u32(intc, "kalray,intc-nr-irqs", &core_nr_irqs))
> +		core_nr_irqs = KVX_CORE_INTC_IRQ;
> +
> +	/* We only have up to 32 interrupts,
> +	 * linear is likely to be the best choice

Use proper comment style please.

Thanks,

        tglx

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ