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Message-ID: <CANAwSgRUeHm+LrCdgwjENB_wEPs9ftCm75Ezap=hUE5kCWRCnQ@mail.gmail.com>
Date: Sun, 28 Jul 2024 11:34:17 +0530
From: Anand Moon <linux.amoon@...il.com>
To: Dragan Simic <dsimic@...jaro.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>, Jonas Karlman <jonas@...boo.se>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 1/3] arm64: dts: rockchip: Add missing pinctrl for
PCIe30x4 node
Hi Dragan,
On Sat, 27 Jul 2024 at 21:23, Dragan Simic <dsimic@...jaro.org> wrote:
>
> Hello Anand,
>
> On 2024-07-26 13:00, Anand Moon wrote:
> > Add missing pinctrl settings for PCIe 3.0 x4 clock request and wake
> > signals. Each component of PCIe communication have the following
> > control
> > signals: PERST, WAKE, CLKREQ, and REFCLK. These signals work to
> > generate
> > high-speed signals and communicate with other PCIe devices.
> > Used by root complex to endpoint depending on the power state.
> >
> > PERST is referred to as a fundamental reset. PERST should be held low
> > until all the power rails in the system and the reference clock are
> > stable.
> > A transition from low to high in this signal usually indicates the
> > beginning of link initialization.
> >
> > WAKE signal is an active-low signal that is used to return the PCIe
> > interface to an active state when in a low-power state.
> >
> > CLKREQ signal is also an active-low signal and is used to request the
> > reference clock.
> >
> > Rename node from 'pcie3' to 'pcie30x4' to align with schematic
> > nomenclature.
>
> I wonder why the three patches in this series cannot be squashed into
> a single patch, because they target the same thing for the same board
> dts file? I don't think that having these three separate patches may
> help with possible regression tracking in the future, for example.
>
Ok, I will merge this in a single patch.
Thanks
-Anand
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