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Message-ID: <76099a4c-c276-403b-89d5-fd72516e01d3@linux.microsoft.com>
Date: Mon, 29 Jul 2024 09:36:47 -0700
From: Roman Kisel <romank@...ux.microsoft.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, arnd@...db.de,
 bhelgaas@...gle.com, bp@...en8.de, catalin.marinas@....com,
 dave.hansen@...ux.intel.com, decui@...rosoft.com, haiyangz@...rosoft.com,
 hpa@...or.com, kw@...ux.com, kys@...rosoft.com, lenb@...nel.org,
 lpieralisi@...nel.org, mingo@...hat.com, rafael@...nel.org, robh@...nel.org,
 tglx@...utronix.de, wei.liu@...nel.org, will@...nel.org,
 linux-acpi@...r.kernel.org, linux-arch@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-hyperv@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org, x86@...nel.org
Cc: apais@...rosoft.com, benhill@...rosoft.com, ssengar@...rosoft.com,
 sunilmut@...rosoft.com, vdso@...bites.dev
Subject: Re: [PATCH v3 6/7] Drivers: hv: vmbus: Get the IRQ number from DT



On 7/27/2024 1:56 AM, Krzysztof Kozlowski wrote:
> On 27/07/2024 00:59, Roman Kisel wrote:
>> @@ -2338,6 +2372,21 @@ static int vmbus_device_add(struct platform_device *pdev)
>>   		cur_res = &res->sibling;
>>   	}
>>   
>> +	/*
>> +	 * Hyper-V always assumes DMA cache coherency, and the DMA subsystem
>> +	 * might default to 'not coherent' on some architectures.
>> +	 * Avoid high-cost cache coherency maintenance done by the CPU.
>> +	 */
>> +#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
>> +	defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
>> +	defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
>> +
>> +	if (!of_property_read_bool(np, "dma-coherent"))
>> +		pr_warn("Assuming cache coherent DMA transactions, no 'dma-coherent' node supplied\n");
> 
> Why do you need this property at all, if it is allways dma-coherent? Are
> you supporting dma-noncoherent somewhere?
No support for non-coherent. Wanted to do a sanity check. Had better 
check for dma-noncoherent and warn about that I believe.

> 
> Best regards,
> Krzysztof
> 

-- 
Thank you,
Roman


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