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Message-ID: <20240729231259.2122976-2-quic_amelende@quicinc.com>
Date: Mon, 29 Jul 2024 16:12:55 -0700
From: Anjelique Melendez <quic_amelende@...cinc.com>
To: <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<amitk@...nel.org>, <thara.gopinath@...il.com>, <andersson@...nel.org>
CC: <quic_collinsd@...cinc.com>, <rafael@...nel.org>,
<daniel.lezcano@...aro.org>, <rui.zhang@...el.com>,
<lukasz.luba@....com>, <linux-arm-msm@...r.kernel.org>,
<linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
"Anjelique
Melendez" <quic_amelende@...cinc.com>
Subject: [PATCH 1/5] dt-bindings: qcom,spmi-temp-alarm: Add compatible for GEN2 rev2 temp alarm
Add compatible "qcom,spmi-temp-alarm-gen2-rev2" for SPMI temp alarm GEN2
revision 2 peripherals. GEN2 rev2 peripherals have individual temp DAC
registers to set temperature thresholds for over-temperature stages 1-3.
Registers are configured based on thermal zone trip definition.
Signed-off-by: Anjelique Melendez <quic_amelende@...cinc.com>
---
.../devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml b/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml
index 30b22151aa82..f9af88d51c2d 100644
--- a/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml
@@ -12,14 +12,16 @@ maintainers:
description:
QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips
that utilize the Qualcomm SPMI implementation. These peripherals provide an
- interrupt signal and status register to identify high PMIC die temperature.
+ interrupt signal and status registers to identify high PMIC die temperature.
allOf:
- $ref: thermal-sensor.yaml#
properties:
compatible:
- const: qcom,spmi-temp-alarm
+ enum:
+ - qcom,spmi-temp-alarm
+ - qcom,spmi-temp-alarm-gen2-rev2
reg:
maxItems: 1
--
2.34.1
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