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Message-Id: <20240729084611.502889-1-ying.huang@intel.com>
Date: Mon, 29 Jul 2024 16:46:08 +0800
From: Huang Ying <ying.huang@...el.com>
To: Dan Williams <dan.j.williams@...el.com>,
	Dave Jiang <dave.jiang@...el.com>
Cc: linux-cxl@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Huang Ying <ying.huang@...el.com>,
	Davidlohr Bueso <dave@...olabs.net>,
	Jonathan Cameron <jonathan.cameron@...wei.com>,
	Alison Schofield <alison.schofield@...el.com>,
	Vishal Verma <vishal.l.verma@...el.com>,
	Ira Weiny <ira.weiny@...el.com>,
	Alejandro Lucero <alucerop@....com>
Subject: [PATCH 0/3] cxl: Preparation of type2 accelerators support

There have been 2 series to add type 2 accelerators support in [1] and [2].

[1] https://lore.kernel.org/linux-cxl/168592149709.1948938.8663425987110396027.stgit@dwillia2-xfh.jf.intel.com/
[2] https://lore.kernel.org/linux-cxl/20240516081202.27023-1-alucerop@amd.com/

Both provide relative complete support, but both are long too.  To
make it easier to review, some preparation of type2 accelerators
support is implemented in this series.  More complete support can be
implemented based on it.

This series has been tested with cxl_test via mocking a type2
accelerator as in [1] above.  Because more type2 accelerators support
than that provided by this series is needed to simulate the device,
the cxl_test patch isn't included in the series.

Huang Ying (3):
  cxl: Set target type of root decoder based on CFMWS restrictions
  cxl: Set target type of region with that of root decoder
  cxl: Avoid to create dax regions for type2 accelerators

 drivers/cxl/acpi.c        |  5 ++++-
 drivers/cxl/core/region.c | 11 ++++++++++-
 2 files changed, 14 insertions(+), 2 deletions(-)

Best Regards,
Huang, Ying

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