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Message-ID: <172224658679.2215.8615544729658438621.tip-bot2@tip-bot2>
Date: Mon, 29 Jul 2024 09:49:46 -0000
From: tip-bot2 for Marek Behún <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: kabel@...nel.org, Thomas Gleixner <tglx@...utronix.de>,
Andrew Lunn <andrew@...n.ch>, ilpo.jarvinen@...ux.intel.com, x86@...nel.org,
linux-kernel@...r.kernel.org, maz@...nel.org
Subject: [tip: irq/core] irqchip/armada-370-xp: Cosmetic fix parentheses in
register constant definitions
The following commit has been merged into the irq/core branch of tip:
Commit-ID: 8333f149fdbe8fbd2b25197b3979b3c393dec855
Gitweb: https://git.kernel.org/tip/8333f149fdbe8fbd2b25197b3979b3c393dec855
Author: Marek Behún <kabel@...nel.org>
AuthorDate: Mon, 08 Jul 2024 17:17:56 +02:00
Committer: Thomas Gleixner <tglx@...utronix.de>
CommitterDate: Mon, 29 Jul 2024 10:57:22 +02:00
irqchip/armada-370-xp: Cosmetic fix parentheses in register constant definitions
Drop parentheses where not needed and add them where it makes sense in
register constant definitions.
Signed-off-by: Marek Behún <kabel@...nel.org>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Link: https://lore.kernel.org/all/20240708151801.11592-6-kabel@kernel.org
---
drivers/irqchip/irq-armada-370-xp.c | 38 ++++++++++++++--------------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 18aca9b..14d213e 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -116,33 +116,33 @@
*/
/* Registers relative to main_int_base */
-#define ARMADA_370_XP_INT_CONTROL (0x00)
-#define ARMADA_370_XP_SW_TRIG_INT (0x04)
-#define ARMADA_370_XP_INT_SET_ENABLE (0x30)
-#define ARMADA_370_XP_INT_CLEAR_ENABLE (0x34)
-#define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + irq*4)
+#define ARMADA_370_XP_INT_CONTROL 0x00
+#define ARMADA_370_XP_SW_TRIG_INT 0x04
+#define ARMADA_370_XP_INT_SET_ENABLE 0x30
+#define ARMADA_370_XP_INT_CLEAR_ENABLE 0x34
+#define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + (irq) * 4)
#define ARMADA_370_XP_INT_SOURCE_CPU_MASK GENMASK(3, 0)
-#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << cpuid)
+#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << (cpuid))
/* Registers relative to per_cpu_int_base */
-#define ARMADA_370_XP_IN_DRBEL_CAUSE (0x08)
-#define ARMADA_370_XP_IN_DRBEL_MASK (0x0c)
-#define ARMADA_375_PPI_CAUSE (0x10)
-#define ARMADA_370_XP_CPU_INTACK (0x44)
-#define ARMADA_370_XP_INT_SET_MASK (0x48)
-#define ARMADA_370_XP_INT_CLEAR_MASK (0x4C)
-#define ARMADA_370_XP_INT_FABRIC_MASK (0x54)
+#define ARMADA_370_XP_IN_DRBEL_CAUSE 0x08
+#define ARMADA_370_XP_IN_DRBEL_MASK 0x0c
+#define ARMADA_375_PPI_CAUSE 0x10
+#define ARMADA_370_XP_CPU_INTACK 0x44
+#define ARMADA_370_XP_INT_SET_MASK 0x48
+#define ARMADA_370_XP_INT_CLEAR_MASK 0x4C
+#define ARMADA_370_XP_INT_FABRIC_MASK 0x54
#define ARMADA_370_XP_INT_CAUSE_PERF(cpu) BIT(cpu)
-#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28)
+#define ARMADA_370_XP_MAX_PER_CPU_IRQS 28
/* IPI and MSI interrupt definitions for IPI platforms */
-#define IPI_DOORBELL_START (0)
-#define IPI_DOORBELL_END (8)
+#define IPI_DOORBELL_START 0
+#define IPI_DOORBELL_END 8
#define IPI_DOORBELL_MASK GENMASK(7, 0)
-#define PCI_MSI_DOORBELL_START (16)
-#define PCI_MSI_DOORBELL_NR (16)
-#define PCI_MSI_DOORBELL_END (32)
+#define PCI_MSI_DOORBELL_START 16
+#define PCI_MSI_DOORBELL_NR 16
+#define PCI_MSI_DOORBELL_END 32
#define PCI_MSI_DOORBELL_MASK GENMASK(31, 16)
/* MSI interrupt definitions for non-IPI platforms */
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