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Message-ID: <ZqeZEB9peRSQkOLZ@void.tail05c47.ts.net>
Date: Mon, 29 Jul 2024 21:28:48 +0800
From: Yanjun Yang <yangyj.ee@...il.com>
To: Philippe CORNU <philippe.cornu@...s.st.com>
Cc: Raphael Gallais-Pou <raphael.gallais-pou@...s.st.com>,
	Yannick Fertre <yannick.fertre@...s.st.com>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	linux-arm-kernel@...ts.infradead.org,
	linux-stm32@...md-mailman.stormreply.com,
	dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [Linux-stm32] [PATCH RESEND v3 0/3] Update STM DSI PHY driver

On Fri, Jul 26, 2024 at 09:55:35AM +0200, Philippe CORNU wrote:
> 
> 
> On 7/22/24 10:38, Yanjun Yang wrote:
> > 
> > This patch (commit id:185f99b614427360) seems to break the dsi of
> > stm32f469 chip.
> > I'm not familiar with the drm and the clock framework, maybe it's
> > because there is no
> >   "ck_dsi_phy" defined for stm32f469.
> > PS:  Sorry for receiving multiple copies of this email, I forgot to
> > use plain text mode last time.
> > 
> 
> Hi,
> Thank you for letting us know that there was this error. We should have
> detected this before merging, really sorry for the problems caused by this
> patch. We will investigate the issue and get back to you as soon as
> possible. In the meantime, I think you can revert this patch in your git
> tree.
> 
> Philippe :-)
> 

Hi,
After some testing, the reason behind my problem is the parent's name of
'clk_dsi_phy' for stm32f4 is 'clk-hse' other than 'ck_hse'.  I don't
know which is the better why to fix it:
1. Change "ck_hse" to "clk-hse" in where "clk_dsi_phy" is defined.
2. Use "pll_in_khz = clk_get_rate(dsi->pllref_clk) / 1000" instead of
   "pll_in_khz = (unsigned int)(parent_rate / 1000)" when get the clock
   rate.

Both method can fix my problem. The first one might break other
platforms. Maybe I should change the clock name of 'clk-hse'. However,
I can't find the defination of this clock name for stm32f4.

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