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Message-Id: <20240730194905.2587202-1-mwalle@kernel.org>
Date: Tue, 30 Jul 2024 21:49:05 +0200
From: Michael Walle <mwalle@...nel.org>
To: Alexandre Belloni <alexandre.belloni@...tlin.com>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>
Cc: linux-rtc@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Michael Walle <mwalle@...nel.org>
Subject: [PATCH] rtc: sun6i: disable automatic clock input switching
The V3(s) will detect a valid external low frequency clock and if it is
not present will automatically switch to the internal one. This might
hide bugs and (hardware) configuration errors. It's even worse because
the internal RTC runs significantly slower (32.000Hz vs 32.768Hz).
Fortunately for us, the V3(s) has an (undocumented) bypass of this
switching and the driver already supports it by setting the
.has_auto_swt flag.
Signed-off-by: Michael Walle <mwalle@...nel.org>
---
This is not tagged as a Fixes commit, because it might break boards with
an incorrect device tree. That is, if the device tree lists the external
crystal but the board doesn't have it the RTC will stop running. I don't
think this is likely though, because the user manual requires the
external clock.
---
drivers/rtc/rtc-sun6i.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/rtc-sun6i.c b/drivers/rtc/rtc-sun6i.c
index 8e0c66906103..e681c1745866 100644
--- a/drivers/rtc/rtc-sun6i.c
+++ b/drivers/rtc/rtc-sun6i.c
@@ -402,6 +402,7 @@ CLK_OF_DECLARE_DRIVER(sun8i_r40_rtc_clk, "allwinner,sun8i-r40-rtc",
static const struct sun6i_rtc_clk_data sun8i_v3_rtc_data = {
.rc_osc_rate = 32000,
.has_out_clk = 1,
+ .has_auto_swt = 1,
};
static void __init sun8i_v3_rtc_clk_init(struct device_node *node)
--
2.39.2
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