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Message-ID: <7ed0f4dc-9865-4139-bd88-7ca270b9a466@web.de>
Date: Tue, 30 Jul 2024 11:25:23 +0200
From: Markus Elfring <Markus.Elfring@....de>
To: Herve Codina <herve.codina@...tlin.com>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linuxppc-dev@...ts.ozlabs.org,
Christophe Leroy <christophe.leroy@...roup.eu>,
Conor Dooley <conor+dt@...nel.org>, Krzysztof Kozlowski
<krzk+dt@...nel.org>, Li Yang <leoyang.li@....com>,
Mark Brown <broonie@...nel.org>, Qiang Zhao <qiang.zhao@....com>,
Rob Herring <robh@...nel.org>
Cc: LKML <linux-kernel@...r.kernel.org>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH 14/36] soc: fsl: cpm1: tsa: Add support for QUICC Engine
(QE) implementation
…
> +++ b/drivers/soc/fsl/qe/tsa.c
…
> +static int tsa_qe_serial_connect(struct tsa_serial *tsa_serial, bool connect)
> +{
…
> + spin_lock_irqsave(&tsa->lock, flags);
> + ret = ucc_set_qe_mux_tsa(ucc_num, connect);
> + spin_unlock_irqrestore(&tsa->lock, flags);
…
Under which circumstances would you become interested to apply a statement
like “guard(spinlock_irqsave)(&tsa->lock);”?
https://elixir.bootlin.com/linux/v6.11-rc1/source/include/linux/spinlock.h#L572
Regards,
Markus
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