| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <87plqvjj5h.fsf@kurt.kurt.home>
Date: Tue, 30 Jul 2024 11:58:34 +0200
From: Kurt Kanzenbach <kurt@...utronix.de>
To: Song Yoong Siang <yoong.siang.song@...el.com>, Tony Nguyen
<anthony.l.nguyen@...el.com>, "David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Richard Cochran
<richardcochran@...il.com>, Alexei Starovoitov <ast@...nel.org>, Daniel
Borkmann <daniel@...earbox.net>, Jesper Dangaard Brouer <hawk@...nel.org>,
John Fastabend <john.fastabend@...il.com>, Vinicius Costa Gomes
<vinicius.gomes@...el.com>, Jonathan Corbet <corbet@....net>, Przemek
Kitszel <przemyslaw.kitszel@...el.com>, Shinas Rasheed
<srasheed@...vell.com>, Kevin Tian <kevin.tian@...el.com>, Brett Creeley
<brett.creeley@....com>, Blanco Alcaine Hector
<hector.blanco.alcaine@...el.com>, Joshua Hay <joshua.a.hay@...el.com>,
Sasha Neftin <sasha.neftin@...el.com>
Cc: intel-wired-lan@...ts.osuosl.org, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, bpf@...r.kernel.org,
linux-doc@...r.kernel.org
Subject: Re: [PATCH iwl-next,v1 2/3] igc: Add default Rx queue configuration
via sysfs
On Tue Jul 30 2024, Song Yoong Siang wrote:
> From: Blanco Alcaine Hector <hector.blanco.alcaine@...el.com>
>
> This commit introduces the support to configure default Rx queue during
> runtime. A new sysfs attribute "default_rx_queue" has been added, allowing
> users to check and modify the default Rx queue.
>
> 1. Command to check the currently configured default Rx queue:
> cat /sys/devices/pci0000:00/.../default_rx_queue
>
> 2. Command to set the default Rx queue to a desired value, for example 3:
> echo 3 > /sys/devices/pci0000:00/.../default_rx_queue
>
> Signed-off-by: Blanco Alcaine Hector <hector.blanco.alcaine@...el.com>
> Signed-off-by: Song Yoong Siang <yoong.siang.song@...el.com>
[...]
> index e5b893fc5b66..df96800f6e3b 100644
> --- a/drivers/net/ethernet/intel/igc/igc_regs.h
> +++ b/drivers/net/ethernet/intel/igc/igc_regs.h
> @@ -63,6 +63,12 @@
> /* RSS registers */
> #define IGC_MRQC 0x05818 /* Multiple Receive Control - RW */
>
> +/* MRQC register bit definitions */
Nit: Now, the MRQC register definitions are scattered over two files:
igc_regs.h and igc.h. igc.h has
#define IGC_MRQC_ENABLE_RSS_MQ 0x00000002
#define IGC_MRQC_RSS_FIELD_IPV4_UDP 0x00400000
#define IGC_MRQC_RSS_FIELD_IPV6_UDP 0x00800000
Maybe combine them into a single location?
> +#define IGC_MRQC_ENABLE_MQ 0x00000000
> +#define IGC_MRQC_ENABLE_MASK GENMASK(2, 0)
> +#define IGC_MRQC_DEFAULT_QUEUE_MASK GENMASK(5, 3)
> +#define IGC_MRQC_DEFAULT_QUEUE_SHIFT 3
Nit: FIELD_GET() and FIELD_PREP() can help to get rid of the manual
shifting. See below.
> +
> /* Filtering Registers */
> #define IGC_ETQF(_n) (0x05CB0 + (4 * (_n))) /* EType Queue Fltr */
> #define IGC_FHFT(_n) (0x09000 + (256 * (_n))) /* Flexible Host Filter */
> diff --git a/drivers/net/ethernet/intel/igc/igc_sysfs.c b/drivers/net/ethernet/intel/igc/igc_sysfs.c
> new file mode 100644
> index 000000000000..34d838e6a019
> --- /dev/null
> +++ b/drivers/net/ethernet/intel/igc/igc_sysfs.c
> @@ -0,0 +1,156 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/* Copyright (c) 2024 Intel Corporation */
> +
> +#include <linux/device.h>
> +#include <linux/kobject.h>
> +#include <linux/module.h>
> +#include <linux/netdevice.h>
> +#include <linux/sysfs.h>
> +#include <linux/types.h>
> +
> +#include "igc.h"
> +#include "igc_regs.h"
> +#include "igc_sysfs.h"
> +
> +/**
> + * igc_is_default_queue_supported - Checks if default Rx queue can be configured
> + * @mrqc: MRQC register content
> + *
> + * Checks if the current configuration of the device supports changing the
> + * default Rx queue configuration.
> + *
> + * Return: true if the default Rx queue can be configured, false otherwise.
> + */
> +static bool igc_is_default_queue_supported(u32 mrqc)
> +{
> + u32 mrqe = mrqc & IGC_MRQC_ENABLE_MASK;
> +
> + /* The default Rx queue setting is applied only if Multiple Receive
> + * Queues (MRQ) as defined by filters (2-tuple filters, L2 Ether-type
> + * filters, SYN filter and flex filters) is enabled.
> + */
> + if (mrqe != IGC_MRQC_ENABLE_MQ && mrqe != IGC_MRQC_ENABLE_RSS_MQ)
> + return false;
> +
> + return true;
> +}
> +
> +/**
> + * igc_get_default_rx_queue - Returns the index of default Rx queue
> + * @adapter: address of board private structure
> + *
> + * Return: index of the default Rx queue.
> + */
> +static u32 igc_get_default_rx_queue(struct igc_adapter *adapter)
> +{
> + struct igc_hw *hw = &adapter->hw;
> + u32 mrqc = rd32(IGC_MRQC);
> +
> + if (!igc_is_default_queue_supported(mrqc)) {
> + netdev_warn(adapter->netdev,
> + "MRQ disabled: default RxQ is ignored.\n");
> + }
> +
> + return (mrqc & IGC_MRQC_DEFAULT_QUEUE_MASK) >>
> + IGC_MRQC_DEFAULT_QUEUE_SHIFT;
Nit: return FIELD_GET(IGC_MRQC_DEFAULT_QUEUE_MASK, mrqc);
> +}
> +
> +/**
> + * igc_set_default_rx_queue - Sets the default Rx queue
> + * @adapter: address of board private structure
> + * @queue: index of the queue to be set as default Rx queue
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +static int igc_set_default_rx_queue(struct igc_adapter *adapter, u32 queue)
> +{
> + struct igc_hw *hw = &adapter->hw;
> + u32 mrqc = rd32(IGC_MRQC);
> +
> + if (!igc_is_default_queue_supported(mrqc)) {
> + netdev_err(adapter->netdev,
> + "Default RxQ not supported. Please enable MRQ.\n");
> + return -EOPNOTSUPP;
> + }
> +
> + if (queue > adapter->rss_queues - 1) {
> + netdev_err(adapter->netdev,
> + "Invalid default RxQ index %d. Valid range: 0-%u.\n",
> + queue, adapter->rss_queues - 1);
> + return -EINVAL;
> + }
> +
> + /* Set the default Rx queue */
> + mrqc = rd32(IGC_MRQC);
> + mrqc &= ~IGC_MRQC_DEFAULT_QUEUE_MASK;
> + mrqc |= queue << IGC_MRQC_DEFAULT_QUEUE_SHIFT;
Nit: mrqc |= FIELD_PREP(IGC_MRQC_DEFAULT_QUEUE_MASK, queue);
Thanks,
Kurt
Download attachment "signature.asc" of type "application/pgp-signature" (862 bytes)
Powered by blists - more mailing lists