linux-kernel - Re: [PATCH v7 02/17] ACPI: scan: Add a weak function to reorder the IRQCHIP probe

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20240731194113.GA77955@bhelgaas>
Date: Wed, 31 Jul 2024 14:41:13 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Sunil V L <sunilvl@...tanamicro.com>
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-riscv@...ts.infradead.org, linux-pci@...r.kernel.org,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>, Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>,
	"Rafael J . Wysocki" <rafael@...nel.org>,
	Len Brown <lenb@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
	Anup Patel <anup@...infault.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Samuel Holland <samuel.holland@...ive.com>,
	Robert Moore <robert.moore@...el.com>,
	Conor Dooley <conor.dooley@...rochip.com>,
	Andrew Jones <ajones@...tanamicro.com>,
	Haibo Xu <haibo1.xu@...el.com>,
	Atish Kumar Patra <atishp@...osinc.com>,
	Drew Fustini <dfustini@...storrent.com>
Subject: Re: [PATCH v7 02/17] ACPI: scan: Add a weak function to reorder the
 IRQCHIP probe

On Mon, Jul 29, 2024 at 07:52:24PM +0530, Sunil V L wrote:
> Unlike OF framework, the irqchip probe using IRQCHIP_ACPI_DECLARE has no
> order defined. Depending on the Makefile is not a good idea. So,
> usually it is worked around by mandating only root interrupt controller
> probed using IRQCHIP_ACPI_DECLARE and other interrupt controllers are
> probed via cascade mechanism.
> 
> However, this is also not a clean solution because if there are multiple
> root controllers (ex: RINTC in RISC-V which is per CPU) which need to be
> probed first, then the cascade will happen for every root controller.
> So, introduce a architecture specific weak function to order the probing
> of the interrupt controllers which can be implemented by different
> architectures as per their interrupt controller hierarchy.

Nit: I think it's nice if the commit log and even the subject line
includes the actual *name* of the function being added.

s/a architecture/an architecture/

No need to repost for these.

> Signed-off-by: Sunil V L <sunilvl@...tanamicro.com>
> ---
>  drivers/acpi/scan.c  | 3 +++
>  include/linux/acpi.h | 2 ++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
> index 59771412686b..52a9dfc8e18c 100644
> --- a/drivers/acpi/scan.c
> +++ b/drivers/acpi/scan.c
> @@ -2755,6 +2755,8 @@ static int __init acpi_match_madt(union acpi_subtable_headers *header,
>  	return 0;
>  }
>  
> +void __weak arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr) { }
> +
>  int __init __acpi_probe_device_table(struct acpi_probe_entry *ap_head, int nr)
>  {
>  	int count = 0;
> @@ -2763,6 +2765,7 @@ int __init __acpi_probe_device_table(struct acpi_probe_entry *ap_head, int nr)
>  		return 0;
>  
>  	mutex_lock(&acpi_probe_mutex);
> +	arch_sort_irqchip_probe(ap_head, nr);
>  	for (ape = ap_head; nr; ape++, nr--) {
>  		if (ACPI_COMPARE_NAMESEG(ACPI_SIG_MADT, ape->id)) {
>  			acpi_probe_count = 0;
> diff --git a/include/linux/acpi.h b/include/linux/acpi.h
> index 0687a442fec7..3fff86f95c2f 100644
> --- a/include/linux/acpi.h
> +++ b/include/linux/acpi.h
> @@ -1343,6 +1343,8 @@ struct acpi_probe_entry {
>  	kernel_ulong_t driver_data;
>  };
>  
> +void arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr);
> +
>  #define ACPI_DECLARE_PROBE_ENTRY(table, name, table_id, subtable,	\
>  				 valid, data, fn)			\
>  	static const struct acpi_probe_entry __acpi_probe_##name	\
> -- 
> 2.43.0
>