linux-kernel - [PATCH V3 0/8] Add camera clock controller support for SM8150

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Message-ID: <20240731062916.2680823-1-quic_skakitap@quicinc.com>
Date: Wed, 31 Jul 2024 11:59:08 +0530
From: Satya Priya Kakitapalli <quic_skakitap@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konrad.dybcio@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, Abhishek Sahu <absahu@...eaurora.org>,
        "Rob
 Herring" <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
CC: Stephen Boyd <sboyd@...eaurora.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>, Ajit Pandey <quic_ajipan@...cinc.com>,
        "Imran
 Shaik" <quic_imrashai@...cinc.com>,
        Taniya Das <quic_tdas@...cinc.com>,
        Jagadeesh Kona <quic_jkona@...cinc.com>, <stable@...r.kernel.org>,
        "Krzysztof
 Kozlowski" <krzysztof.kozlowski@...aro.org>,
        Bryan O'Donoghue
	<bryan.odonoghue@...aro.org>,
        Satya Priya Kakitapalli
	<quic_skakitap@...cinc.com>
Subject: [PATCH V3 0/8] Add camera clock controller support for SM8150

Add camcc support and Regera PLL ops. Also, fix the pll post div mask.

Changes in V3:
 - Split the fixes into separate patches, remove RETAIN_FF flag for
   gdscs and document the BIT(15) of pll alpha value.
 - Link to v2: https://lore.kernel.org/all/20240702-camcc-support-sm8150-v2-1-4baf54ec7333@quicinc.com

Changes in v2:
 - As per Konrad's comments, re-use the zonda pll code for regera, as
   both are mostly same.
 - Fix the zonda_set_rate API and also the pll_post_div shift used in
   trion pll post div set rate API
 - Link to v1: https://lore.kernel.org/r/20240229-camcc-support-sm8150-v1-0-8c28c6c87990@quicinc.com


Satya Priya Kakitapalli (7):
  clk: qcom: clk-alpha-pll: Fix the pll post div mask
  clk: qcom: clk-alpha-pll: Fix the trion pll postdiv set rate API
  clk: qcom: clk-alpha-pll: Fix zonda set_rate failure when PLL is
    disabled
  clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL
  dt-bindings: clock: qcom: Add SM8150 camera clock controller
  clk: qcom: Add camera clock controller driver for SM8150
  arm64: dts: qcom: Add camera clock controller for sm8150

Taniya Das (1):
  clk: qcom: clk-alpha-pll: Add support for Regera PLL ops

 .../bindings/clock/qcom,sm8150-camcc.yaml     |   77 +
 arch/arm64/boot/dts/qcom/sa8155p.dtsi         |    4 +
 arch/arm64/boot/dts/qcom/sm8150.dtsi          |   13 +
 drivers/clk/qcom/Kconfig                      |    9 +
 drivers/clk/qcom/Makefile                     |    1 +
 drivers/clk/qcom/camcc-sm8150.c               | 2159 +++++++++++++++++
 drivers/clk/qcom/clk-alpha-pll.c              |   57 +-
 drivers/clk/qcom/clk-alpha-pll.h              |    5 +
 include/dt-bindings/clock/qcom,sm8150-camcc.h |  135 ++
 9 files changed, 2456 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8150-camcc.yaml
 create mode 100644 drivers/clk/qcom/camcc-sm8150.c
 create mode 100644 include/dt-bindings/clock/qcom,sm8150-camcc.h

-- 
2.25.1