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Message-ID:
<SJ0PR18MB386546CFB80D1D17477CDF40DBB12@SJ0PR18MB3865.namprd18.prod.outlook.com>
Date: Wed, 31 Jul 2024 13:52:06 +0000
From: Gowthami Thiagarajan <gthiagarajan@...vell.com>
To: "will@...nel.org" <will@...nel.org>
CC: George Cherian <gcherian@...vell.com>,
Sunil Kovvuri Goutham
<sgoutham@...vell.com>,
Bharat Bhushan <bbhushan2@...vell.com>,
"mark.rutland@....com" <mark.rutland@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v6 0/3] Marvell Odyssey uncore performance monitor support
Hi Will,
Do you have any feedback for this patchset?
Thanks,
Gowthami
> -----Original Message-----
> From: Gowthami Thiagarajan <gthiagarajan@...vell.com>
> Sent: Thursday, July 4, 2024 2:50 PM
> To: will@...nel.org; mark.rutland@....com; linux-arm-kernel@...ts.infradead.org; linux-
> kernel@...r.kernel.org
> Cc: George Cherian <gcherian@...vell.com>; Sunil Kovvuri Goutham <sgoutham@...vell.com>; Bharat
> Bhushan <bbhushan2@...vell.com>; Gowthami Thiagarajan <gthiagarajan@...vell.com>
> Subject: [PATCH v6 0/3] Marvell Odyssey uncore performance monitor support
>
> Odyssey is a 64 bit ARM based SoC with multiple performance monitor
> units for various blocks.
>
> This series of patches introduces support for uncore performance monitor
> units (PMUs) on the Marvell Odyssey platform. The PMUs covered in this
> series include the DDR PMU and LLC-TAD PMU.
>
> v5->v6:
> - Previous patch series didn't apply properly. Fixed the issue.
>
> Gowthami Thiagarajan (3):
> perf/marvell: Refactor to extract platform data - no functional change
> perf/marvell: perf/marvell: Odyssey DDR Performance monitor support
> perf/marvell : Odyssey LLC-TAD performance monitor support
>
> drivers/perf/marvell_cn10k_ddr_pmu.c | 530 +++++++++++++++++++++++----
> drivers/perf/marvell_cn10k_tad_pmu.c | 66 +++-
> 2 files changed, 521 insertions(+), 75 deletions(-)
>
> --
> 2.25.1
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