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Message-ID: <9f3399ba-eb45-40d4-8d4b-e4c6c6856fd9@kernel.org>
Date: Wed, 31 Jul 2024 15:57:49 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Thomas Bonnefille <thomas.bonnefille@...tlin.com>,
 Jonathan Cameron <jic23@...nel.org>, Lars-Peter Clausen <lars@...afoo.de>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Chen Wang <unicorn_wang@...look.com>,
 Inochi Amaoto <inochiama@...look.com>,
 Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
 <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
 Miquèl Raynal <miquel.raynal@...tlin.com>,
 linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v3 3/3] riscv: dts: sophgo: Add SARADC description

On 31/07/2024 14:24, Thomas Bonnefille wrote:
> Adds SARADC nodes for the common Successive Approximation Analog to
> Digital Converter used in Sophgo CV18xx series SoC.
> This patch adds two nodes for the two controllers the board, one in
> the Active domain and the other in the No-Die domain.
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 891932ae470f..e6c1a84d3e55 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -133,6 +133,14 @@ portd: gpio-controller@0 {
>  			};
>  		};
>  
> +		saradc: adc@...0000 {
> +			compatible = "sophgo,cv1800b-saradc";
> +			clocks = <&clk CLK_SARADC>;
> +			interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
> +			reg = <0x030F0000 0x1000>;

Please read carefully DTS coding style.

Best regards,
Krzysztof


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