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Message-Id: <20240731141353.759643-5-kan.liang@linux.intel.com>
Date: Wed, 31 Jul 2024 07:13:53 -0700
From: kan.liang@...ux.intel.com
To: peterz@...radead.org,
	mingo@...hat.com,
	linux-kernel@...r.kernel.org
Cc: acme@...nel.org,
	namhyung@...nel.org,
	irogers@...gle.com,
	Zhenyu Wang <zhenyuw@...ux.intel.com>,
	Kan Liang <kan.liang@...ux.intel.com>
Subject: [PATCH 5/5] perf/x86/intel/uncore: Use D0:F0 as a default device

From: Zhenyu Wang <zhenyuw@...ux.intel.com>

Some uncore PMON registers are located in the MMIO space of the Host
Bridge and DRAM Controller device, which is located at D0:F0 for
Tiger Lake and later client generation.

Use D0:F0 as a default device. So it doesn't need to keep adding the
complete Device ID list for each generation anymore.

Reviewed-by: Kan Liang <kan.liang@...ux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@...ux.intel.com>
---
 arch/x86/events/intel/uncore_snb.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c
index f0495867f054..1de24202ac7a 100644
--- a/arch/x86/events/intel/uncore_snb.c
+++ b/arch/x86/events/intel/uncore_snb.c
@@ -1504,6 +1504,10 @@ static struct pci_dev *tgl_uncore_get_mc_dev(void)
 		ids++;
 	}
 
+	/* Just try to grab 00:00.0 device */
+	if (!mc_dev)
+		mc_dev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
+
 	return mc_dev;
 }
 
-- 
2.38.1


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