linux-kernel - [PATCH v2] firmware: ti_sci: add CPU latency constraint management

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <20240802212702.3424132-1-khilman@baylibre.com>
Date: Fri,  2 Aug 2024 14:27:02 -0700
From: Kevin Hilman <khilman@...libre.com>
To: Nishanth Menon <nm@...com>,
	Tero Kristo <kristo@...nel.org>,
	Santosh Shilimkar <ssantosh@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Akashdeep Kaur <a-kaur@...com>,
	Markus Schneider-Pargmann <msp@...libre.com>,
	Vibhore Vardhan <vibhore@...com>,
	Dhruva Gole <d-gole@...com>
Subject: [PATCH v2] firmware: ti_sci: add CPU latency constraint management

During system-wide suspend, check if any of the CPUs have PM QoS
resume latency constraints set.  If so, set TI SCI constraint.

TI SCI has a single system-wide latency constraint, so use the max of
any of the CPU latencies as the system-wide value.

Note: DM firmware clears all constraints at resume time, so
constraints need to be checked/updated/sent at each system suspend.

Co-developed-by: Vibhore Vardhan <vibhore@...com>
Signed-off-by: Vibhore Vardhan <vibhore@...com>
Signed-off-by: Kevin Hilman <khilman@...libre.com>
Reviewed-by: Dhruva Gole <d-gole@...com>
Signed-off-by: Dhruva Gole <d-gole@...com>
---
Depends on the TI SCI series where support for the constraints APIs
are added:
https://lore.kernel.org/r/20240801195422.2296347-1-msp@baylibre.com

v1->v2: fixed silly compile error

 drivers/firmware/ti_sci.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index c6544cc12417..a141e07e7864 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c
@@ -9,6 +9,7 @@
 #define pr_fmt(fmt) "%s: " fmt, __func__
 
 #include <linux/bitmap.h>
+#include <linux/cpu.h>
 #include <linux/debugfs.h>
 #include <linux/export.h>
 #include <linux/io.h>
@@ -19,6 +20,7 @@
 #include <linux/of.h>
 #include <linux/of_platform.h>
 #include <linux/platform_device.h>
+#include <linux/pm_qos.h>
 #include <linux/property.h>
 #include <linux/semaphore.h>
 #include <linux/slab.h>
@@ -3640,8 +3642,26 @@ static int ti_sci_prepare_system_suspend(struct ti_sci_info *info)
 static int ti_sci_suspend(struct device *dev)
 {
 	struct ti_sci_info *info = dev_get_drvdata(dev);
+	struct device *cpu_dev;
+	s32 val, cpu_lat = 0;
 	int ret;
 
+	if (info->fw_caps & MSG_FLAG_CAPS_LPM_DM_MANAGED) {
+		for_each_possible_cpu(i) {
+			cpu_dev = get_cpu_device(i);
+			val = dev_pm_qos_read_value(cpu_dev, DEV_PM_QOS_RESUME_LATENCY);
+			if (val != PM_QOS_RESUME_LATENCY_NO_CONSTRAINT)
+				cpu_lat = max(cpu_lat, val);
+		}
+		if (cpu_lat && (cpu_lat != PM_QOS_RESUME_LATENCY_NO_CONSTRAINT)) {
+			dev_dbg(cpu_dev, "%s: sending max CPU latency=%u\n", __func__, cpu_lat);
+			ret = ti_sci_cmd_set_latency_constraint(&info->handle,
+								cpu_lat, TISCI_MSG_CONSTRAINT_SET);
+			if (ret)
+				return ret;
+		}
+	}
+
 	ret = ti_sci_prepare_system_suspend(info);
 	if (ret)
 		return ret;
-- 
2.46.0