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Message-ID: <20240803114951.6b79e86a@jic23-huawei>
Date: Sat, 3 Aug 2024 11:49:51 +0100
From: Jonathan Cameron <jic23@...nel.org>
To: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
Cc: Lars-Peter Clausen <lars@...afoo.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Chen Wang <unicorn_wang@...look.com>, Inochi Amaoto
<inochiama@...look.com>, Paul Walmsley <paul.walmsley@...ive.com>, Palmer
Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, Thomas
Petazzoni <thomas.petazzoni@...tlin.com>, Miquèl Raynal
<miquel.raynal@...tlin.com>, linux-iio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v3 2/3] iio: adc: sophgo-saradc: Add driver for Sophgo
SARADC
On Wed, 31 Jul 2024 14:24:15 +0200
Thomas Bonnefille <thomas.bonnefille@...tlin.com> wrote:
> This adds a driver for the common Sophgo SARADC.
>
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
One small bug (you will return 1 on an error), and a few minor other comments inline.
Thanks,
Jonathan
> diff --git a/drivers/iio/adc/sophgo-cv18xx-adc.c b/drivers/iio/adc/sophgo-cv18xx-adc.c
> new file mode 100644
> index 000000000000..27e1aac9560f
> --- /dev/null
> +++ b/drivers/iio/adc/sophgo-cv18xx-adc.c
> @@ -0,0 +1,206 @@
> +
> +#define CV18XX_ADC_CTRL_REG 0x04
> +#define CV18XX_ADC_EN BIT(0)
> +#define CV18XX_ADC_SEL(x) BIT((x) + 4)
> +#define CV18XX_ADC_STATUS_REG 0x08
> +#define CV18XX_ADC_BUSY BIT(0)
> +#define CV18XX_ADC_CYC_SET_REG 0x0C
> +/* The default cycle configuration is set to maximize the accuracy */
> +#define CV18XX_ADC_DEF_STARTUP_CYCLE 0xF
> +#define CV18XX_ADC_DEF_SAMPLE_WINDOW (0xF << 8)
define masks for the various fields and use FIELD_PREP()
on those with the default values - but do that inline not up here
where we should only set the masks.
> +#define CV18XX_ADC_DEF_CLOCK_DIVIDER (0x1 << 12)
> +#define CV18XX_ADC_DEF_COMPARE_CYCLE (0xF << 16)
> +#define CV18XX_ADC_CH_RESULT_REG(x) (0x10 + 4 * (x))
> +#define CV18XX_ADC_CH_RESULT GENMASK(11, 0)
> +#define CV18XX_ADC_CH_VALID BIT(15)
> +#define CV18XX_ADC_INTR_EN_REG 0x20
> +#define CV18XX_ADC_INTR_CLR_REG 0x24
> +#define CV18XX_ADC_INTR_CLR_BIT BIT(0)
> +#define CV18XX_ADC_INTR_STA_REG 0x28
> +#define CV18XX_ADC_INTR_STA_BIT BIT(0)
> +static const struct iio_chan_spec sophgo_channels[] = {
> + CV18XX_ADC_CHANNEL(1),
why index from 1? We tend to use 0 as the base, though there is no ABI
requirement to do so. Hence this is ok, just unusual.
> + CV18XX_ADC_CHANNEL(2),
> + CV18XX_ADC_CHANNEL(3),
> +};
> +static int cv18xx_adc_read_raw(struct iio_dev *indio_dev,
> + struct iio_chan_spec const *chan,
> + int *val, int *val2, long mask)
> +{
> +
> + switch (mask) {
> + case IIO_CHAN_INFO_RAW:
> + {
I'd move { to previous line.
That will avoid need to indent another tab for the scope.
> + struct cv18xx_adc *saradc = iio_priv(indio_dev);
> + u32 sample;
> + int ret;
Can move ert into scoped_guard scope.
> +
> + scoped_guard(mutex, &saradc->lock) {
> + cv18xx_adc_start_measurement(saradc, chan->scan_index);
> + ret = cv18xx_adc_wait(saradc);
> + if (ret < 0)
> + return ret;
> +
> + sample = readl(saradc->regs + CV18XX_ADC_CH_RESULT_REG(chan->scan_index));
> + }
> + if (!(sample & CV18XX_ADC_CH_VALID))
> + return -ENODATA;
> +
> + *val = sample & CV18XX_ADC_CH_RESULT;
> + return IIO_VAL_INT;
> + }
> + case IIO_CHAN_INFO_SCALE:
> + *val = 3300;
> + *val2 = 12;
> + return IIO_VAL_FRACTIONAL_LOG2;
> + default:
> + return -EINVAL;
> + }
> +}
> +static int cv18xx_adc_probe(struct platform_device *pdev)
> +{
> + struct cv18xx_adc *saradc;
> + struct iio_dev *indio_dev;
> + int ret;
> +
> + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*saradc));
> + if (!indio_dev)
> + return -ENOMEM;
> +
> + saradc = iio_priv(indio_dev);
> + indio_dev->name = "sophgo-cv18xx-adc";
> + indio_dev->modes = INDIO_DIRECT_MODE;
> + indio_dev->info = &cv18xx_adc_info;
> + indio_dev->num_channels = ARRAY_SIZE(sophgo_channels);
> + indio_dev->channels = sophgo_channels;
> +
> + ret = IS_ERR(devm_clk_get_enabled(&pdev->dev, NULL));
> + if (ret)
PTR_ERR() not IS_ERR() for the return as you are returning a bool currently
not an error code. Similar to what you do for the regulator below.
Better to use a local struct clk * and check that rather than convert
directly to the error value.
> + return ret;
> +
> + saradc->regs = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(saradc->regs))
> + return PTR_ERR(saradc->regs);
> +
> + saradc->irq = platform_get_irq_optional(pdev, 0);
> + if (saradc->irq >= 0) {
> + init_completion(&saradc->completion);
> + ret = devm_request_irq(&pdev->dev, saradc->irq,
> + cv18xx_adc_interrupt_handler, 0,
> + dev_name(&pdev->dev), saradc);
> + if (ret)
> + return ret;
> +
> + writel(1, saradc->regs + CV18XX_ADC_INTR_EN_REG);
> + }
> +
> + ret = devm_mutex_init(&pdev->dev, &saradc->lock);
> + if (ret)
> + return ret;
> +
> + platform_set_drvdata(pdev, indio_dev);
> + writel(CV18XX_ADC_DEF_STARTUP_CYCLE |
> + CV18XX_ADC_DEF_SAMPLE_WINDOW |
> + CV18XX_ADC_DEF_CLOCK_DIVIDER |
> + CV18XX_ADC_DEF_COMPARE_CYCLE
> + , saradc->regs + CV18XX_ADC_CYC_SET_REG);
Blank line here. + that leading comma should be on end of the line above.
> + return devm_iio_device_register(&pdev->dev, indio_dev);
> +
No blank line here.
> +}
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