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Message-ID: <Zq-t-1jfSg3RmLKW@matsya>
Date: Sun, 4 Aug 2024 22:06:11 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Abel Vesa <abel.vesa@...aro.org>
Cc: Kishon Vijay Abraham I <kishon@...nel.org>,
	Johan Hovold <johan+linaro@...nel.org>,
	Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
	linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
	linux-kernel@...r.kernel.org, Qiang Yu <quic_qianyu@...cinc.com>
Subject: Re: [PATCH v2] phy: qcom: qmp-pcie: Configure all tables on port B
 PHY

On 01-08-24, 18:54, Abel Vesa wrote:
> From: Qiang Yu <quic_qianyu@...cinc.com>
> 
> Currently, only the RX and TX tables are written to the second PHY
> (port B) when the 4-lanes mode is configured, but according to Qualcomm
> internal documentation, the pcs, pcs_misc, serdes and ln_shrd tables need
> to be written as well.

Sorry this does not apply on phy/next please rebase and resend

-- 
~Vinod

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