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Message-ID: <CAAhV-H5UEaRON4Gc3ms_790Z=JbHf8ZzdKcwqbhgBNyOLVgpJA@mail.gmail.com>
Date: Sun, 4 Aug 2024 10:41:15 +0800
From: Huacai Chen <chenhuacai@...nel.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Tianyang Zhang <zhangtianyang@...ngson.cn>, corbet@....net, alexs@...nel.org,
siyanteng@...ngson.cn, kernel@...0n.name, jiaxun.yang@...goat.com,
gaoliang@...ngson.cn, wangliupu@...ngson.cn, lvjianmin@...ngson.cn,
yijun@...ngson.cn, mhocko@...e.com, akpm@...ux-foundation.org,
dianders@...omium.org, maobibo@...ngson.cn, xry111@...111.site,
zhaotianrui@...ngson.cn, nathan@...nel.org, yangtiezhu@...ngson.cn,
zhoubinbin@...ngson.cn, loongarch@...ts.linux.dev, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, Huacai Chen <chenhuacai@...ngson.cn>
Subject: Re: [PATCH V7] LoongArch: Add AVEC irqchip support
On Sat, Aug 3, 2024 at 5:31 PM Thomas Gleixner <tglx@...utronix.de> wrote:
>
> Tianyang!
>
> On Sat, Aug 03 2024 at 14:40, Tianyang Zhang wrote:
> >
> > We consider that since the original extioi-msi is still using the
> > legacy-MSI interrupt model at irq-loongson-pch-msi.c, if per-device-MSI
> > is directly supported in the AVEC support patch, it will result in the
> > simultaneous use of two MSI-interrupt-mode in irq-loongson-pch-msi.c,
> > which may seem a bit strange. So we decided to split it into two
> > patches, the first one using tlegace-MSI to support AVEC interrupt
> > controllers, and the second one will be uniformly modified to use
> > per-device-MSI
>
> Adding new code with old functionality to convert it five minutes later
> to the modern interface is just backwards.
>
> Convert the existing code over first and then add the new one, no?
Yes, that looks better, thanks.
Huacai
>
> Thanks,
>
> tglx
>
>
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