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Message-Id: <03ac9ec9c23bbe4c3b30271e76537bdbe5638665.1722847198.git.unicorn_wang@outlook.com>
Date: Mon, 5 Aug 2024 17:19:43 +0800
From: Chen Wang <unicornxw@...il.com>
To: adrian.hunter@...el.com,
aou@...s.berkeley.edu,
conor+dt@...nel.org,
guoren@...nel.org,
inochiama@...look.com,
jszhang@...nel.org,
krzysztof.kozlowski+dt@...aro.org,
palmer@...belt.com,
paul.walmsley@...ive.com,
robh@...nel.org,
ulf.hansson@...aro.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-mmc@...r.kernel.org,
linux-riscv@...ts.infradead.org,
chao.wei@...hgo.com,
haijiao.liu@...hgo.com,
xiaoguang.xing@...hgo.com,
tingzhu.wang@...hgo.com
Cc: Chen Wang <unicorn_wang@...look.com>
Subject: [PATCH v6 8/8] riscv: sophgo: dts: add mmc controllers for SG2042 SoC
From: Chen Wang <unicorn_wang@...look.com>
SG2042 has two MMC controller, one for emmc, another for sd-card.
Signed-off-by: Chen Wang <unicorn_wang@...look.com>
---
.../boot/dts/sophgo/sg2042-milkv-pioneer.dts | 17 +++++++++++
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 28 +++++++++++++++++++
2 files changed, 45 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
index 80cb017974d8..da6596e9192e 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
+++ b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
@@ -26,6 +26,23 @@ &cgi_dpll1 {
clock-frequency = <25000000>;
};
+&emmc {
+ bus-width = <4>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ wp-inverted;
+ status = "okay";
+};
+
+&sd {
+ bus-width = <4>;
+ no-sdio;
+ no-mmc;
+ wp-inverted;
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index 34c802bd3f9b..f0ccefecc9c3 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -399,5 +399,33 @@ uart0: serial@...0000000 {
resets = <&rstgen RST_UART0>;
status = "disabled";
};
+
+ emmc: mmc@...002a000 {
+ compatible = "sophgo,sg2042-dwcmshc";
+ reg = <0x70 0x4002a000 0x0 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <134 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkgen GATE_CLK_EMMC_100M>,
+ <&clkgen GATE_CLK_AXI_EMMC>,
+ <&clkgen GATE_CLK_100K_EMMC>;
+ clock-names = "core",
+ "bus",
+ "timer";
+ status = "disabled";
+ };
+
+ sd: mmc@...002b000 {
+ compatible = "sophgo,sg2042-dwcmshc";
+ reg = <0x70 0x4002b000 0x0 0x1000>;
+ interrupt-parent = <&intc>;
+ interrupts = <136 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkgen GATE_CLK_SD_100M>,
+ <&clkgen GATE_CLK_AXI_SD>,
+ <&clkgen GATE_CLK_100K_SD>;
+ clock-names = "core",
+ "bus",
+ "timer";
+ status = "disabled";
+ };
};
};
--
2.34.1
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