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Message-ID: <CAOMZO5DzH1Ldfg1rr7ET+2Y138Sv+G9HV6iRiTPOaOUgJ+asHQ@mail.gmail.com>
Date: Mon, 5 Aug 2024 10:39:56 -0300
From: Fabio Estevam <festevam@...il.com>
To: Benjamin Hahn <B.Hahn@...tec.de>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>, Pengutronix Kernel Team <kernel@...gutronix.de>,
Teresa Remmet <t.remmet@...tec.de>, devicetree@...r.kernel.org, imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: freescale: imx8mp-phyboard-pollux: Add and
enable TPM
Hi Benjamin,
On Mon, Aug 5, 2024 at 10:33 AM Benjamin Hahn <B.Hahn@...tec.de> wrote:
> +/* TPM */
> +&ecspi1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
> + num-cs = <1>;
num-cs is not needed.
The number of chip selects can be retrieved from cs-gpios.
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
> + status = "okay";
> +
> + tpm: tpm_tis@0 {
Node names should be generic.
Documentation/devicetree/bindings/tpm/tcg,tpm_tis-spi.yaml suggests 'tpm', so:
tpm: tmp@0 {
> &iomuxc {
> + pinctrl_ecspi1: ecspi1grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x80
> + MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x80
> + MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x80
> + >;
> + };
> +
> + pinctrl_ecspi1_cs: ecspi1csgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x00
Maybe simpler to put MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 as part of
pinctrl_ecspi1.
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