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Message-ID: <ZrDdRZOdXv4c6-P8@shikoro>
Date: Mon, 5 Aug 2024 16:10:13 +0200
From: Wolfram Sang <wsa+renesas@...g-engineering.com>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>,
Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>, linux-mmc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v5 3/3] mmc: renesas_sdhi: Add RZ/V2H(P) compatible string
On Wed, Jul 24, 2024 at 07:21:19PM +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> The SD/MMC block on the RZ/V2H(P) ("R9A09G057") SoC is similar to that
> of the R-Car Gen3, but it has some differences:
> - HS400 is not supported.
> - It has additional SD_STATUS register to control voltage,
> power enable and reset.
> - It supports fixed address mode.
>
> To accommodate these differences, a SoC-specific 'renesas,sdhi-r9a09g057'
> compatible string is added.
>
> Note for RZ/V2H(P), we are using the `of_rzg2l_compatible` OF data as it
> already handles no HS400 and fixed address mode support. Since the SDxIOVS
> and SDxPWEN pins can always be used as GPIO pins on the RZ/V2H(P) SoC, no
> driver changes are done to control the SD_STATUS register.
Okay, so you mux the pins as GPIOs and leave SD_STATUS alone. Smart
move.
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
For the record:
Reviewed-by: Wolfram Sang <wsa+renesas@...g-engineering.com>
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