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Message-ID: <ZrHasuAXM2Ph9V5p@MiWiFi-R3L-srv>
Date: Tue, 6 Aug 2024 16:11:30 +0800
From: Baoquan He <bhe@...hat.com>
To: Jinjie Ruan <ruanjinjie@...wei.com>
Cc: "Russell King (Oracle)" <linux@...linux.org.uk>,
akpm@...ux-foundation.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [RFC PATCH] ARM: Support allocating crashkernel above 4G for LPAE
On 08/06/24 at 10:46am, Jinjie Ruan wrote:
>
>
> On 2024/8/5 10:56, Baoquan He wrote:
> > On 08/05/24 at 09:23am, Jinjie Ruan wrote:
> >>
> >>
> >> On 2024/8/2 19:01, Russell King (Oracle) wrote:
> >>> On Fri, Aug 02, 2024 at 05:25:10PM +0800, Jinjie Ruan wrote:
> >>>> As ARM LPAE feature support accessing memory beyond the 4G limit, define
> >>>> HAVE_ARCH_CRASHKERNEL_RESERVATION_HIGH macro to support reserving crash
> >>>> memory above 4G for ARM32 LPAE.
> >>>>
> >>>> No test because there is no LPAE ARM32 hardware.
> >>>
> >>> Why are you submitting patches for features you can't test?
> >>>
> >>> I'm not going to apply this without it being properly tested, because I
> >>> don't believe that this will work in the generic case.
> >>>
> >>> If the crash kernel is located in memory outside of the lower 4GiB of
> >>> address space, and there is no alias within physical address space
> >>> for that memory, then there is *no* *way* for such a kernel to boot.
> >>
> >> I'm sorry that I released this patch without testing it. I actually
> >> intended to bring up this issue for discussion. If anyone has the
> >> environment to test it, that would be great. In the meantime, we could
> >> have a discussion on the significance and relevance of this approach.
> >
> > I don't know arm32 and its LPAE. I know a little about x86_32 where
> > crashkernel can only be reserved below 896M because of the virtual
> > memory layout, and all memory above that is high memory which can't be
> > used as kernel memory directly. So from this patch, arm32 is different
> > than x86_32.
>
> Hi,Baoquan
>
> Does the following code make sense? Now parse_crashkernel() use
> HAVE_ARCH_CRASHKERNEL_RESERVATION_HIGH macro to parse "high", but use
> CONFIG_64BIT when reserving "low" memory in reserve_crashkernel_low().
I am fine with it. BUT have you addressed Russell's concern, e.g how to
test it actually?
>
> And when LPAE is enabled in ARM32, and "high" is reserved,
> reserve_crashkernel_low() need also function ok.
>
> --- a/kernel/crash_reserve.c
> +++ b/kernel/crash_reserve.c
> @@ -354,7 +354,7 @@ early_param("crashkernel", parse_crashkernel_dummy);
> #ifdef CONFIG_ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
> static int __init reserve_crashkernel_low(unsigned long long low_size)
> {
> -#ifdef CONFIG_64BIT
> +#ifdef HAVE_ARCH_CRASHKERNEL_RESERVATION_HIGH
> unsigned long long low_base;
>
>
> >
> >>
> >>>
> >>> So, right now I believe this patch to be *fundamentally* wrong.
> >>>
> >>
> >
> >
>
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