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Message-ID: <04db5243-f522-00b4-ae12-991da3e67513@linux.intel.com>
Date: Tue, 6 Aug 2024 17:38:41 +0300 (EEST)
From: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
To: 412574090@....com
cc: bhelgaas@...gle.com, linux-pci@...r.kernel.org,
LKML <linux-kernel@...r.kernel.org>, xiongxin@...inos.cn,
weiyufeng <weiyufeng@...inos.cn>
Subject: Re: [PATCH] PCI: Add PCI_EXT_CAP_ID_PL_64GT define
On Tue, 6 Aug 2024, 412574090@....com wrote:
> From: weiyufeng <weiyufeng@...inos.cn>
>
> PCIe r6.0, sec 7.7.7.1, defines a new 64.0 GT/s PCIe Extended Capability
> ID,Add the define for PCI_EXT_CAP_ID_PL_64GT for drivers that will want
> this whilst doing Gen6 accesses.
>
> Signed-off-by: weiyufeng <weiyufeng@...inos.cn>
> ---
> include/uapi/linux/pci_regs.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index 94c00996e633..cc875534dae1 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -741,6 +741,7 @@
> #define PCI_EXT_CAP_ID_DLF 0x25 /* Data Link Feature */
> #define PCI_EXT_CAP_ID_PL_16GT 0x26 /* Physical Layer 16.0 GT/s */
> #define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */
> +#define PCI_EXT_CAP_ID_PL_64GT 0x31 /* Physical Layer 64.0 GT/s */
> #define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
These should be in numerical order.
> #define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE
This was not adapted??
--
i.
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