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Message-ID: <20240807151723.613742-1-stewart.hildebrand@amd.com>
Date: Wed, 7 Aug 2024 11:17:09 -0400
From: Stewart Hildebrand <stewart.hildebrand@....com>
To: Bjorn Helgaas <bhelgaas@...gle.com>, Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>, Dave Hansen
<dave.hansen@...ux.intel.com>, "H. Peter Anvin" <hpa@...or.com>, "Michael
Ellerman" <mpe@...erman.id.au>, Nicholas Piggin <npiggin@...il.com>,
Christophe Leroy <christophe.leroy@...roup.eu>, "Naveen N. Rao"
<naveen.n.rao@...ux.ibm.com>, Thomas Zimmermann <tzimmermann@...e.de>, "Arnd
Bergmann" <arnd@...db.de>, Sam Ravnborg <sam@...nborg.org>, Yongji Xie
<elohimes@...il.com>, Ilpo Järvinen
<ilpo.jarvinen@...ux.intel.com>, Philipp Stanner <pstanner@...hat.com>
CC: Stewart Hildebrand <stewart.hildebrand@....com>, <x86@...nel.org>,
<linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linuxppc-dev@...ts.ozlabs.org>
Subject: [PATCH v3 0/8] PCI: Align small BARs
In this context, "small" is defined as max(SZ_4K, PAGE_SIZE).
This series sets the default minimum resource alignment to
max(SZ_4K, PAGE_SIZE) for memory BARs. In preparation, it makes an
optimization and addresses some corner cases observed when reallocating
BARs. I consider the prepapatory patches to be prerequisites to changing
the default BAR alignment.
I considered introducing checks for the specific scenarios described,
but chose not to pursue this. A check such as "if (xen_domain())" may be
pretty simple, but that doesn't account for other hypervisors. If other
hypervisors are to be considered, or if we try to dynamically reallocate
BARs for devices being marked for passthrough, such a check may quickly
grow unwieldy. Further, checking for the MSI-X tables residing in a
small (<4k) BAR is unlikely to be a one-liner. Making 4k alignment the
default seems more robust. Lastly, when using IORESOURCE_STARTALIGN, all
resources in the system need to be aligned.
I considered alternatively adding new functionality to the
pci=resource_alignment= option, but that approach was already attempted
and decided against [1].
[1] https://lore.kernel.org/linux-pci/1473757234-5284-4-git-send-email-xyjxie@linux.vnet.ibm.com/
v2->v3:
* clarify 4k vs PAGE_SIZE
* rename ("x86/PCI: Move some logic to new function") to
("x86/PCI: Improve code readability")
* rename ("PCI: Align small (<4k) BARs") to
("PCI: Align small BARs")
v1->v2:
* rename ("PCI: don't clear already cleared bit") to
("PCI: Don't unnecessarily disable memory decoding")
* new patch: ("x86/PCI: Move some logic to new function")
* new patch: ("powerpc/pci: Preserve IORESOURCE_STARTALIGN alignment")
Stewart Hildebrand (8):
x86/PCI: Improve code readability
PCI: Don't unnecessarily disable memory decoding
PCI: Restore resource alignment
PCI: Restore memory decoding after reallocation
x86/PCI: Preserve IORESOURCE_STARTALIGN alignment
powerpc/pci: Preserve IORESOURCE_STARTALIGN alignment
PCI: Don't reassign resources that are already aligned
PCI: Align small BARs
arch/powerpc/kernel/pci-common.c | 6 +++--
arch/x86/pci/i386.c | 38 +++++++++++++++------------
drivers/pci/pci.c | 43 +++++++++++++++++++++++--------
drivers/pci/setup-bus.c | 44 ++++++++++++++++++++++++++++++++
include/linux/pci.h | 2 ++
5 files changed, 103 insertions(+), 30 deletions(-)
--
2.46.0
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