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Message-ID: <20240807052359.290046-4-Shyam-sundar.S-k@amd.com>
Date: Wed, 7 Aug 2024 10:53:56 +0530
From: Shyam Sundar S K <Shyam-sundar.S-k@....com>
To: Alexandre Belloni <alexandre.belloni@...tlin.com>, Jarkko Nikula
<jarkko.nikula@...ux.intel.com>
CC: Guruvendra Punugupati <Guruvendra.Punugupati@....com>, Krishnamoorthi M
<krishnamoorthi.m@....com>, <linux-i3c@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, Shyam Sundar S K <Shyam-sundar.S-k@....com>
Subject: [PATCH RESEND v3 3/6] i3c: mipi-i3c-hci: Add a quirk to set PIO mode
The AMD HCI controller currently only supports PIO mode but exposes DMA
rings to the OS, which leads to the controller being configured in DMA
mode. To address this, add a quirk to avoid configuring the controller in
DMA mode and default to PIO mode.
Additionally, introduce a generic quirk infrastructure to the mipi-i3c-hci
driver to facilitate seamless future quirk additions.
Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@....com>
Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@....com>
Co-developed-by: Guruvendra Punugupati <Guruvendra.Punugupati@....com>
Signed-off-by: Guruvendra Punugupati <Guruvendra.Punugupati@....com>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@....com>
---
drivers/i3c/master/mipi-i3c-hci/Makefile | 3 ++-
drivers/i3c/master/mipi-i3c-hci/core.c | 7 +++++++
drivers/i3c/master/mipi-i3c-hci/hci.h | 2 ++
drivers/i3c/master/mipi-i3c-hci/hci_quirks.c | 20 ++++++++++++++++++++
4 files changed, 31 insertions(+), 1 deletion(-)
create mode 100644 drivers/i3c/master/mipi-i3c-hci/hci_quirks.c
diff --git a/drivers/i3c/master/mipi-i3c-hci/Makefile b/drivers/i3c/master/mipi-i3c-hci/Makefile
index a658e7b8262c..1f8cd5c48fde 100644
--- a/drivers/i3c/master/mipi-i3c-hci/Makefile
+++ b/drivers/i3c/master/mipi-i3c-hci/Makefile
@@ -3,4 +3,5 @@
obj-$(CONFIG_MIPI_I3C_HCI) += mipi-i3c-hci.o
mipi-i3c-hci-y := core.o ext_caps.o pio.o dma.o \
cmd_v1.o cmd_v2.o \
- dat_v1.o dct_v1.o
+ dat_v1.o dct_v1.o \
+ hci_quirks.o
diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c
index a16da70bdfe1..4926fde6087d 100644
--- a/drivers/i3c/master/mipi-i3c-hci/core.c
+++ b/drivers/i3c/master/mipi-i3c-hci/core.c
@@ -754,6 +754,13 @@ static int i3c_hci_init(struct i3c_hci *hci)
return -EINVAL;
}
+ /* Initialize quirks for AMD platforms */
+ amd_i3c_hci_quirks_init(hci);
+
+ regval = reg_read(HCI_VERSION);
+ if (hci->quirks & HCI_QUIRK_PIO_MODE)
+ hci->RHS_regs = NULL;
+
/* Try activating DMA operations first */
if (hci->RHS_regs) {
reg_clear(HC_CONTROL, HC_CONTROL_PIO_MODE);
diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h
index f94d95e024be..a7ea37f8f8e0 100644
--- a/drivers/i3c/master/mipi-i3c-hci/hci.h
+++ b/drivers/i3c/master/mipi-i3c-hci/hci.h
@@ -135,11 +135,13 @@ struct i3c_hci_dev_data {
/* list of quirks */
#define HCI_QUIRK_RAW_CCC BIT(1) /* CCC framing must be explicit */
+#define HCI_QUIRK_PIO_MODE BIT(2) /* Set PIO mode for AMD platforms */
/* global functions */
void mipi_i3c_hci_resume(struct i3c_hci *hci);
void mipi_i3c_hci_pio_reset(struct i3c_hci *hci);
void mipi_i3c_hci_dct_index_reset(struct i3c_hci *hci);
+void amd_i3c_hci_quirks_init(struct i3c_hci *hci);
#endif
diff --git a/drivers/i3c/master/mipi-i3c-hci/hci_quirks.c b/drivers/i3c/master/mipi-i3c-hci/hci_quirks.c
new file mode 100644
index 000000000000..897c0231f585
--- /dev/null
+++ b/drivers/i3c/master/mipi-i3c-hci/hci_quirks.c
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * I3C HCI Quirks
+ *
+ * Copyright 2024 Advanced Micro Devices, Inc.
+ *
+ * Authors: Shyam Sundar S K <Shyam-sundar.S-k@....com>
+ * Guruvendra Punugupati <Guruvendra.Punugupati@....com>
+ */
+
+#include <linux/i3c/master.h>
+#include "hci.h"
+
+void amd_i3c_hci_quirks_init(struct i3c_hci *hci)
+{
+#if defined(CONFIG_X86)
+ if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+ hci->quirks |= HCI_QUIRK_PIO_MODE;
+#endif
+}
--
2.25.1
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