[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID:
<MA0P287MB28229593FA53BF75C625B468FEBA2@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM>
Date: Fri, 9 Aug 2024 14:26:37 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Palmer Dabbelt <palmer@...belt.com>
Cc: Chen Wang <unicornxw@...il.com>, paul.walmsley@...ive.com,
aou@...s.berkeley.edu, inochiama@...look.com, conor.dooley@...rochip.com,
guoren@...nel.org, emil.renner.berthing@...onical.com,
apatel@...tanamicro.com, hal.feng@...rfivetech.com, dfustini@...libre.com,
prabhakar.mahadev-lad.rj@...renesas.com, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, haijiao.liu@...hgo.com,
xiaoguang.xing@...hgo.com
Subject: Re: [PATCH] riscv: defconfig: sophgo: enable clks for sg2042
On 2024/8/5 10:33, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@...look.com>
>
> Enable clk generators for sg2042 due to many peripherals rely on
> these clocks.
>
> Signed-off-by: Chen Wang <unicorn_wang@...look.com>
> ---
> arch/riscv/configs/defconfig | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 0d678325444f..d43a028909e5 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -249,6 +249,9 @@ CONFIG_VIRTIO_BALLOON=y
> CONFIG_VIRTIO_INPUT=y
> CONFIG_VIRTIO_MMIO=y
> CONFIG_CLK_SOPHGO_CV1800=y
> +CONFIG_CLK_SOPHGO_SG2042_PLL=y
> +CONFIG_CLK_SOPHGO_SG2042_CLKGEN=y
> +CONFIG_CLK_SOPHGO_SG2042_RPGATE=y
> CONFIG_SUN8I_DE2_CCU=m
> CONFIG_RENESAS_OSTM=y
> CONFIG_SUN50I_IOMMU=y
>
> base-commit: de9c2c66ad8e787abec7c9d7eff4f8c3cdd28aed
Hiļ¼Palmer,
Could you please have a look on this patch and pick it for next tree?
These clk drivers are required for sg2042 to boot into minimal console.
Thanks,
Chen
Powered by blists - more mailing lists