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Message-ID: <alpine.DEB.2.21.2408091327390.61955@angie.orcam.me.uk>
Date: Fri, 9 Aug 2024 14:25:27 +0100 (BST)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
cc: Bjorn Helgaas <helgaas@...nel.org>, linux-pci@...r.kernel.org, 
    LKML <linux-kernel@...r.kernel.org>, 
    Mika Westerberg <mika.westerberg@...ux.intel.com>
Subject: Re: [PATCH 1/2] PCI: Clear LBMS on resume to avoid Target Speed
 quirk

On Wed, 7 Feb 2024, Ilpo Järvinen wrote:

> > > > Because if it is constantly picking another speed, it would mean you get 
> > > > LBMS set over and over again, no? If that happens 34-35 times per second, 
> > > > it should be set already again when we get into that quirk because there 
> > > > was some wait before it gets called.
> > > 
> > >  I'll see if I can experiment with the hardware over the next couple of 
> > > days and come back with my findings.
> > 
> > Okay thanks.
> 
> One point I'd be very interested to know if the link actually comes up 
> successfully (even if briefly) because this has large implications whether 
> the quirk can actually be invoked from the bandwidth controller code.

 That was more than a couple of days, sorry about it.  I have now been 
able to verify that LBMS keeps getting reasserted over and over again as 
the device goes through the infinite link training dance.  I haven't ever 
observed the link to become active in the course.  Here's a short log of 
commands repeatedly entered at the command prompt:

# setpci -s 02:03.0 CAP_EXP+0x12.W
5011
# setpci -s 02:03.0 CAP_EXP+0x12.W
5812
# setpci -s 02:03.0 CAP_EXP+0x12.W
5811
# setpci -s 02:03.0 CAP_EXP+0x12.W
5812
# setpci -s 02:03.0 CAP_EXP+0x12.W
5011
# setpci -s 02:03.0 CAP_EXP+0x12.W
5811
# setpci -s 02:03.0 CAP_EXP+0x12.W
5811
# setpci -s 02:03.0 CAP_EXP+0x12.W
5812
# setpci -s 02:03.0 CAP_EXP+0x12.W
5812
# setpci -s 02:03.0 CAP_EXP+0x12.W
5811
# setpci -s 02:03.0 CAP_EXP+0x12.W
5811
# setpci -s 02:03.0 CAP_EXP+0x12.W
5812
# setpci -s 02:03.0 CAP_EXP+0x12.W
5812
# setpci -s 02:03.0 CAP_EXP+0x12.W
5811

As you can see the Link Training bit oscillates as I previously reported 
and noted in the introduction to `pcie_failed_link_retrain', and also the 
Current Link Speed field flips between 2.5GT/s and 5GT/s.

 HTH,

  Maciej

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