From fa774bc0b787e223fe75d21f20d47067fa9ef8ff Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Tue, 6 Aug 2024 12:09:43 +0800 Subject: [PATCH 1/4] dts: rk3576: add UFS Signed-off-by: Shawn Lin --- arch/arm64/boot/dts/rockchip/rk3576-evb-v10.dts | 5 +++++ arch/arm64/boot/dts/rockchip/rk3576.dtsi | 24 ++++++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb-v10.dts b/arch/arm64/boot/dts/rockchip/rk3576-evb-v10.dts index 0bff873..97ee5cf 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-evb-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-evb-v10.dts @@ -641,6 +641,11 @@ }; }; +&ufs { + reset-gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + &sdmmc { max-frequency = <200000000>; no-sdio; diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index b10552d..ec0a855 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1084,6 +1084,30 @@ }; }; + ufs: ufs@2a2d0000 { + compatible = "rockchip,rk3576-ufs"; + reg = <0x0 0x2a2d0000 0 0x10000>, /* 0: HCI standard */ + <0x0 0x2b040000 0 0x10000>, /* 1: Mphy */ + <0x0 0x2601f000 0 0x1000>, /* 2: HCI Vendor specified */ + <0x0 0x2603c000 0 0x1000>, /* 3: Mphy Vendor specified */ + <0x0 0x2a2e0000 0 0x10000>; /* 4: HCI apb */ + reg-names = "hci", "mphy", "hci_grf", "mphy_grf", "hci_apb"; + clocks = <&cru ACLK_UFS_SYS>, <&cru PCLK_USB_ROOT>, <&cru PCLK_MPHY>, + <&cru CLK_REF_UFS_CLKOUT>; + clock-names = "core", "pclk", "pclk_mphy", + "ref_out"; + freq-table-hz = <50000000 250000000>, <0 0>, <0 0>, <0 0>; + assigned-clocks = <&cru CLK_REF_OSC_MPHY>; + assigned-clock-parents = <&cru CLK_REF_MPHY_26M>; + interrupts = ; + power-domains = <&power RK3576_PD_USB>; + pinctrl-0 = <&ufs_refclk>; + pinctrl-names = "default"; + resets = <&cru SRST_A_UFS_BIU>, <&cru SRST_A_UFS_SYS>, <&cru SRST_A_UFS>, <&cru SRST_P_UFS_GRF>; + reset-names = "biu", "sys", "ufs", "grf"; + status = "disabled"; + }; + sdmmc: mmc@2a310000 { compatible = "rockchip,rk3576-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0x2a310000 0x0 0x4000>; -- 2.7.4