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Message-Id: <20240809025431.14605-5-tina.zhang@intel.com>
Date: Fri, 9 Aug 2024 10:54:30 +0800
From: Tina Zhang <tina.zhang@...el.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>,
Kevin Tian <kevin.tian@...el.com>
Cc: iommu@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Tina Zhang <tina.zhang@...el.com>
Subject: [PATCH v2 4/5] vt-d/iommu: Refactor quirk_extra_dev_tlb_flush()
Extract the core logic from quirk_extra_dev_tlb_flush() into a new
helper __quirk_extra_dev_tlb_flush(). This helper is for accommodating
for both individual and batched TLB invalidation commands, thereby
streamlining the process for handling device-specific TLB flush quirks.
Signed-off-by: Tina Zhang <tina.zhang@...el.com>
---
drivers/iommu/intel/iommu.c | 55 +++++++++++++++++++++++++++++--------
drivers/iommu/intel/iommu.h | 4 +++
2 files changed, 47 insertions(+), 12 deletions(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 9ff8b83c19a3..160d569015b4 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -4875,6 +4875,41 @@ static void __init check_tylersburg_isoch(void)
vtisochctrl);
}
+static inline void __quirk_extra_dev_tlb_flush(struct device_domain_info *info,
+ unsigned long address, unsigned long mask,
+ u32 pasid, u16 qdep,
+ struct qi_batch *batch)
+{
+ u16 sid;
+
+ if (likely(!info->dtlb_extra_inval))
+ return;
+
+ sid = PCI_DEVID(info->bus, info->devfn);
+ if (batch == NULL) {
+ if (pasid == IOMMU_NO_PASID)
+ qi_flush_dev_iotlb(info->iommu, sid, info->pfsid,
+ qdep, address, mask);
+ else
+ qi_flush_dev_iotlb_pasid(info->iommu, sid,
+ info->pfsid, pasid,
+ qdep, address, mask);
+ } else {
+ if (pasid == IOMMU_NO_PASID)
+ qi_batch_add_dev_iotlb_desc(info->iommu, sid,
+ info->pfsid, qdep,
+ address, mask, batch);
+ else
+ qi_batch_add_dev_iotlb_pasid_desc(info->iommu,
+ sid,
+ info->pfsid,
+ pasid, qdep,
+ address,
+ mask,
+ batch);
+ }
+}
+
/*
* Here we deal with a device TLB defect where device may inadvertently issue ATS
* invalidation completion before posted writes initiated with translated address
@@ -4905,19 +4940,15 @@ void quirk_extra_dev_tlb_flush(struct device_domain_info *info,
unsigned long address, unsigned long mask,
u32 pasid, u16 qdep)
{
- u16 sid;
+ __quirk_extra_dev_tlb_flush(info, address, mask, pasid, qdep, NULL);
+}
- if (likely(!info->dtlb_extra_inval))
- return;
-
- sid = PCI_DEVID(info->bus, info->devfn);
- if (pasid == IOMMU_NO_PASID) {
- qi_flush_dev_iotlb(info->iommu, sid, info->pfsid,
- qdep, address, mask);
- } else {
- qi_flush_dev_iotlb_pasid(info->iommu, sid, info->pfsid,
- pasid, qdep, address, mask);
- }
+void batch_quirk_extra_dev_tlb_flush(struct device_domain_info *info,
+ unsigned long address, unsigned long mask,
+ u32 pasid, u16 qdep,
+ struct qi_batch *batch)
+{
+ __quirk_extra_dev_tlb_flush(info, address, mask, pasid, qdep, batch);
}
#define ecmd_get_status_code(res) (((res) & 0xff) >> 1)
diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h
index cd7c1d0a01c6..04aa1f200124 100644
--- a/drivers/iommu/intel/iommu.h
+++ b/drivers/iommu/intel/iommu.h
@@ -1109,6 +1109,10 @@ void qi_flush_dev_iotlb_pasid(struct intel_iommu *iommu, u16 sid, u16 pfsid,
void quirk_extra_dev_tlb_flush(struct device_domain_info *info,
unsigned long address, unsigned long pages,
u32 pasid, u16 qdep);
+void batch_quirk_extra_dev_tlb_flush(struct device_domain_info *info,
+ unsigned long address, unsigned long mask,
+ u32 pasid, u16 qdep,
+ struct qi_batch *batch);
void qi_flush_pasid_cache(struct intel_iommu *iommu, u16 did, u64 granu,
u32 pasid);
--
2.43.0
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