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Message-ID: <87ttfsrn6l.ffs@tglx>
Date: Sun, 11 Aug 2024 01:08:18 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Mitchell Levy via B4 Relay <devnull+levymitchell0.gmail.com@...nel.org>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>, Dave
Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org, "H. Peter Anvin"
<hpa@...or.com>, Kan Liang <kan.liang@...ux.intel.com>, "Peter Zijlstra
(Intel)" <peterz@...radead.org>
Cc: stable@...r.kernel.org, Borislav Petkov <bp@...e.de>,
linux-kernel@...r.kernel.org, Dave Hansen <dave.hansen@...el.com>,
Mitchell Levy <levymitchell0@...il.com>
Subject: Re: [PATCH v2] x86/fpu: Avoid writing LBR bit to IA32_XSS unless
supported
On Fri, Aug 09 2024 at 13:53, Mitchell Levy via wrote:
> From: Mitchell Levy <levymitchell0@...il.com>
...
> Signed-off-by: Mitchell Levy <levymitchell0@...il.com>
> ---
> Changes in v2:
> - Corrected Fixes tag (thanks tglx)
> - Properly check for XSAVES support of LBR (thanks tglx)
IOW. I provided you the proper fix and now you are reposting it and
claiming authorship for it?
May I ask you to read Documentation/process/ ?
Thanks,
tglx
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