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Message-ID: <20240809211549.28d651d7@kernel.org>
Date: Fri, 9 Aug 2024 21:15:49 -0700
From: Jakub Kicinski <kuba@...nel.org>
To: Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>
Cc: netdev@...r.kernel.org, vadim.fedorenko@...ux.dev, jiri@...nulli.us,
 corbet@....net, davem@...emloft.net, edumazet@...gle.com,
 pabeni@...hat.com, donald.hunter@...il.com, anthony.l.nguyen@...el.com,
 przemyslaw.kitszel@...el.com, intel-wired-lan@...ts.osuosl.org,
 linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org, Aleksandr
 Loktionov <aleksandr.loktionov@...el.com>
Subject: Re: [PATCH net-next v1 1/2] dpll: add Embedded SYNC feature for a
 pin

On Thu,  8 Aug 2024 13:20:12 +0200 Arkadiusz Kubalewski wrote:
> +Device may provide ability to use Embedded SYNC feature. It allows
> +to embed additional SYNC signal into the base frequency of a pin - a one
> +special pulse of base frequency signal every time SYNC signal pulse
> +happens. The user can configure the frequency of Embedded SYNC.
> +The Embedded SYNC capability is always related to a given base frequency
> +and HW capabilities. The user is provided a range of embedded sync
> +frequencies supported, depending on current base frequency configured for
> +the pin.

Interesting, noob question perhaps, is the signal somehow well
known or the implementation is vendor specific so both ends have
to be from the same vendor? May be worth calling that out, either way.

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