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Message-ID: <Zro5Pi2LbnCjBiNA@lizhi-Precision-Tower-5810>
Date: Mon, 12 Aug 2024 12:33:02 -0400
From: Frank Li <Frank.li@....com>
To: Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
"open list:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS" <linux-pci@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>
Cc: imx@...ts.linux.dev
Subject: Re: [PATCH v3 1/1] dt-bindings: PCI: layerscape-pci: Fix property
'fsl,pcie-scfg' type
On Mon, Jul 01, 2024 at 06:16:12PM -0400, Frank Li wrote:
> fsl,pcie-scfg actually need an argument when there are more than one PCIe
> instances. Change it to phandle-array and use items to describe each field
> means.
>
> Fix below warning.
>
> arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dtb: pcie@...0000: fsl,pcie-scfg:0: [22, 0] is too long
> from schema $id: http://devicetree.org/schemas/pci/fsl,layerscape-pcie.yaml#
>
> Signed-off-by: Frank Li <Frank.Li@....com>
> ---
Bjorn and Krzysztof Wilczyński:
Can you take care this patch? Rob already acked.
Frank
> Change form v2 to v3
> - remove minItems because all dts use one argument.
> Change from v1 to v2
> - update commit message.
> ---
> .../devicetree/bindings/pci/fsl,layerscape-pcie.yaml | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml
> index 793986c5af7ff..741b96defcc95 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml
> @@ -43,10 +43,15 @@ properties:
> - const: config
>
> fsl,pcie-scfg:
> - $ref: /schemas/types.yaml#/definitions/phandle
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> description: A phandle to the SCFG device node. The second entry is the
> physical PCIe controller index starting from '0'. This is used to get
> SCFG PEXN registers.
> + items:
> + items:
> + - description: A phandle to the SCFG device node
> + - description: PCIe controller index starting from '0'
> + maxItems: 1
>
> big-endian:
> $ref: /schemas/types.yaml#/definitions/flag
> --
> 2.34.1
>
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