linux-kernel - Re: [PATCH v2 0/2] Add fixups for two-plane serial NAND flash

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Message-ID: <20240812105630.2b71ed19@xps-13>
Date: Mon, 12 Aug 2024 10:56:30 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Cheng Ming Lin <linchengming884@...il.com>
Cc: vigneshr@...com, linux-mtd@...ts.infradead.org,
 linux-kernel@...r.kernel.org, richard@....at, alvinzhou@...c.com.tw,
 leoyu@...c.com.tw, Cheng Ming Lin <chengminglin@...c.com.tw>
Subject: Re: [PATCH v2 0/2] Add fixups for two-plane serial NAND flash

Hi Cheng,

linchengming884@...il.com wrote on Thu, 18 Jul 2024 15:53:54 +0800:

> From: Cheng Ming Lin <chengminglin@...c.com.tw>
> 
> Macronix serial NAND flash with a two-plane structure
> requires insertion of Plane Select bit into the column
> address during the write_to_cache operation.
> 
> Additionally, for MX35{U,F}2G14AC, insertion of Plane
> Select bit into the column address is required during
> the read_from_cache operation.

I guess if the plane bit is needed for your chips, it is also needed
for other whips with two planes? Could it be possible that we never had
support for devices with more than one plane and you just fall into a
common issue? Maybe we should always add the plane information when
there is more than one plane to address? Can you check whether this is
specific to Macronix or not?

In this case we wouldn't need a specific fixup.

> 
> These flashes have been validated on Xilinx zynq-picozed
> board which included Macronix SPI Host.
> 
> Cheng Ming Lin (2):
>   mtd: spinand: Add fixups for spinand
>   mtd: spinand: macronix: Fixups for Plane Select bit
> 
>  drivers/mtd/nand/spi/core.c     |  7 ++++
>  drivers/mtd/nand/spi/macronix.c | 66 ++++++++++++++++++++++++++++++---
>  include/linux/mtd/spinand.h     | 17 +++++++++
>  3 files changed, 84 insertions(+), 6 deletions(-)
> 


Thanks,
Miquèl