linux-kernel - Re: [PATCH v2 7/8] arm64: dts: renesas: r9a09g057h44-gp-evk: Enable OSTM, I2C, and SDHI

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Message-ID: <CA+V-a8vioGija2x=eoqn1jZbMpK8PAeLzXQZP52hQn976BKisw@mail.gmail.com>
Date: Mon, 12 Aug 2024 10:16:22 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Biju Das <biju.das.jz@...renesas.com>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>, 
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>, 
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v2 7/8] arm64: dts: renesas: r9a09g057h44-gp-evk: Enable
 OSTM, I2C, and SDHI

Hi Biju,

On Mon, Aug 12, 2024 at 8:40 AM Biju Das <biju.das.jz@...renesas.com> wrote:
>
> Hi Prabhakar,
>
> Thanks for the patch.
>
> > -----Original Message-----
> > From: Prabhakar <prabhakar.csengg@...il.com>
> > Sent: Sunday, August 11, 2024 9:50 PM
> > Subject: [PATCH v2 7/8] arm64: dts: renesas: r9a09g057h44-gp-evk: Enable OSTM, I2C, and SDHI
> >
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > Enable OSTM0-OSTM7, RIIC{0,1,2,3,6,7,8}, and SDHI1 (available on the SD2
> > connector) on the RZ/V2H GP-EVK platform.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > ---
> > v1->v2
> > - New patch
> > ---
> >  .../boot/dts/renesas/r9a09g057h44-gp-evk.dts  | 191 ++++++++++++++++++
> >  1 file changed, 191 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r9a09g057h44-gp-evk.dts
> > b/arch/arm64/boot/dts/renesas/r9a09g057h44-gp-evk.dts
> > index 593c48181248..11c13c85d278 100644
> > --- a/arch/arm64/boot/dts/renesas/r9a09g057h44-gp-evk.dts
> > +++ b/arch/arm64/boot/dts/renesas/r9a09g057h44-gp-evk.dts
> > @@ -7,6 +7,8 @@
> >
> >  /dts-v1/;
> >
> > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
> > +#include <dt-bindings/gpio/gpio.h>
> >  #include "r9a09g057.dtsi"
> >
> >  / {
> > @@ -14,6 +16,14 @@ / {
> >       compatible = "renesas,gp-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";
> >
> >       aliases {
> > +             i2c0 = &i2c0;
> > +             i2c1 = &i2c1;
> > +             i2c2 = &i2c2;
> > +             i2c3 = &i2c3;
> > +             i2c6 = &i2c6;
> > +             i2c7 = &i2c7;
> > +             i2c8 = &i2c8;
> > +             mmc1 = &sdhi1;
> >               serial0 = &scif;
> >       };
> >
> > @@ -32,17 +42,186 @@ memory@...000000 {
> >               device_type = "memory";
> >               reg = <0x2 0x40000000 0x2 0x00000000>;
> >       };
> > +
> > +     reg_3p3v: regulator1 {
> > +             compatible = "regulator-fixed";
> > +
> > +             regulator-name = "fixed-3.3V";
> > +             regulator-min-microvolt = <3300000>;
> > +             regulator-max-microvolt = <3300000>;
> > +             regulator-boot-on;
> > +             regulator-always-on;
> > +     };
> > +
> > +     vqmmc_sdhi1: regulator-vccq-sdhi1 {
> > +             compatible = "regulator-gpio";
> > +             regulator-name = "SDHI1 VccQ";
> > +             gpios = <&pinctrl RZG2L_GPIO(10, 2) GPIO_ACTIVE_HIGH>;
> > +             regulator-min-microvolt = <1800000>;
> > +             regulator-max-microvolt = <3300000>;
> > +             gpios-states = <0>;
> > +             states = <3300000 0>, <1800000 1>;
> > +     };
> >  };
> >
> >  &audio_extal_clk {
> >       clock-frequency = <22579200>;
> >  };
> >
> > +&i2c0 {
> > +     pinctrl-0 = <&i2c0_pins>;
> > +     pinctrl-names = "default";
> > +
> > +     status = "okay";
> > +};
> > +
>
> clock-frequency = <100000>; in SoC dtsim
>
> Why frequency set to 100kHz for all the i2c nodes even though SoC supports
> Transfer rate up to 1MHz? Is it board limitation restricting to 100kHz?
>
This is due to driver limitation, once driver support for FM+ gets
accepted [0] I plan to update the default frequency to !MHz in SoC
DTSI.

[0] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20240711115207.2843133-9-claudiu.beznea.uj@bp.renesas.com/

Cheers,
Prabhakar