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Message-ID: <202408122007.quTiDXPR-lkp@intel.com>
Date: Mon, 12 Aug 2024 20:52:33 +0800
From: kernel test robot <lkp@...el.com>
To: Hui-Ping Chen <hpchen0nvt@...il.com>, miquel.raynal@...tlin.com,
richard@....at, vigneshr@...com, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, sumit.semwal@...aro.org,
christian.koenig@....com, esben@...nix.com
Cc: llvm@...ts.linux.dev, oe-kbuild-all@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-mtd@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-media@...r.kernel.org, dri-devel@...ts.freedesktop.org,
linaro-mm-sig@...ts.linaro.org,
Hui-Ping Chen <hpchen0nvt@...il.com>
Subject: Re: [PATCH 2/2] mtd: rawnand: nuvoton: add new driver for the
Nuvoton MA35 SoC
Hi Hui-Ping,
kernel test robot noticed the following build warnings:
[auto build test WARNING on mtd/nand/next]
[also build test WARNING on linus/master v6.11-rc3 next-20240812]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Hui-Ping-Chen/dt-bindings-mtd-nuvoton-ma35d1-nand-add-new-bindings/20240812-110259
base: https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next
patch link: https://lore.kernel.org/r/20240812030045.20831-3-hpchen0nvt%40gmail.com
patch subject: [PATCH 2/2] mtd: rawnand: nuvoton: add new driver for the Nuvoton MA35 SoC
config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20240812/202408122007.quTiDXPR-lkp@intel.com/config)
compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240812/202408122007.quTiDXPR-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202408122007.quTiDXPR-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/mtd/nand/raw/nuvoton_ma35d1_nand.c:991:29: warning: cast from 'irqreturn_t (*)(int, struct ma35_nand_info *)' (aka 'enum irqreturn (*)(int, struct ma35_nand_info *)') to 'irq_handler_t' (aka 'enum irqreturn (*)(int, void *)') converts to incompatible function type [-Wcast-function-type-strict]
991 | if (request_irq(nand->irq, (irq_handler_t)&ma35_nand_irq,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
vim +991 drivers/mtd/nand/raw/nuvoton_ma35d1_nand.c
921
922 static int ma35_nand_probe(struct platform_device *pdev)
923 {
924 struct ma35_nand_info *nand;
925 struct nand_chip *chip;
926 struct mtd_info *mtd;
927 int retval = 0;
928
929 nand = devm_kzalloc(&pdev->dev, sizeof(struct ma35_nand_info), GFP_KERNEL);
930 if (!nand)
931 return -ENOMEM;
932
933 nand_controller_init(&nand->controller);
934
935 nand->regs = devm_platform_ioremap_resource(pdev, 0);
936 if (IS_ERR(nand->regs))
937 return PTR_ERR(nand->regs);
938
939 nand->dev = &pdev->dev;
940 chip = &nand->chip;
941 mtd = nand_to_mtd(chip);
942 nand_set_controller_data(chip, nand);
943 nand_set_flash_node(chip, pdev->dev.of_node);
944
945 mtd->priv = chip;
946 mtd->owner = THIS_MODULE;
947 mtd->dev.parent = &pdev->dev;
948
949 nand->clk = of_clk_get(pdev->dev.of_node, 0);
950 if (IS_ERR(nand->clk))
951 return dev_err_probe(&pdev->dev, PTR_ERR(nand->clk),
952 "failed to find nand clock\n");
953
954 retval = clk_prepare_enable(nand->clk);
955 if (retval < 0) {
956 dev_err(&pdev->dev, "Failed to enable clock\n");
957 return -ENXIO;
958 }
959
960 nand->chip.controller = &nand->controller;
961
962 chip->legacy.cmdfunc = ma35_nand_command;
963 chip->legacy.waitfunc = ma35_waitfunc;
964 chip->legacy.read_byte = ma35_nand_read_byte;
965 chip->legacy.select_chip = ma35_nand_select_chip;
966 chip->legacy.read_buf = ma35_read_buf_dma;
967 chip->legacy.write_buf = ma35_write_buf_dma;
968 chip->legacy.dev_ready = ma35_nand_devready;
969 chip->legacy.chip_delay = 25; /* us */
970
971 /* Read OOB data first, then HW read page */
972 chip->ecc.hwctl = ma35_nand_enable_hwecc;
973 chip->ecc.calculate = ma35_nand_calculate_ecc;
974 chip->ecc.correct = ma35_nand_correct_data;
975 chip->ecc.write_page = ma35_nand_write_page_hwecc;
976 chip->ecc.read_page = ma35_nand_read_page_hwecc_oob_first;
977 chip->ecc.read_oob = ma35_nand_read_oob_hwecc;
978 chip->options |= (NAND_NO_SUBPAGE_WRITE | NAND_USES_DMA);
979
980 ma35_nand_initialize(nand);
981 platform_set_drvdata(pdev, nand);
982
983 nand->controller.ops = &ma35_nand_controller_ops;
984
985 nand->irq = platform_get_irq(pdev, 0);
986 if (nand->irq < 0) {
987 dev_err(&pdev->dev, "failed to get platform irq\n");
988 return -EINVAL;
989 }
990
> 991 if (request_irq(nand->irq, (irq_handler_t)&ma35_nand_irq,
992 IRQF_TRIGGER_HIGH, "ma35d1-nand", nand)) {
993 dev_err(&pdev->dev, "Error requesting NAND IRQ\n");
994 return -ENXIO;
995 }
996
997 retval = nand_scan(chip, 1);
998 if (retval)
999 return retval;
1000
1001 if (mtd_device_register(mtd, nand->parts, nand->nr_parts)) {
1002 nand_cleanup(chip);
1003 devm_kfree(&pdev->dev, nand);
1004 return retval;
1005 }
1006
1007 pr_info("ma35-nfi: registered successfully! mtdid=%s\n", mtd->name);
1008
1009 return retval;
1010 }
1011
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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