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Message-ID: <20240813033508.781022-1-daiweili@google.com>
Date: Mon, 12 Aug 2024 20:35:08 -0700
From: Daiwei Li <daiweili@...gle.com>
To: vinicius.gomes@...el.com
Cc: anthony.l.nguyen@...el.com, daiweili@...il.com, davem@...emloft.net, 
	edumazet@...gle.com, intel-wired-lan@...ts.osuosl.org, kuba@...nel.org, 
	kurt@...utronix.de, linux-kernel@...r.kernel.org, netdev@...r.kernel.org, 
	pabeni@...hat.com, przemyslaw.kitszel@...el.com, richardcochran@...il.com, 
	sasha.neftin@...el.com, Daiwei Li <daiweili@...gle.com>
Subject: [PATCH iwl-net v2] igb: Fix not clearing TimeSync interrupts for 82580

82580 NICs have a hardware bug that makes it
necessary to write into the TSICR (TimeSync Interrupt Cause) register
to clear it:
https://lore.kernel.org/all/CDCB8BE0.1EC2C%25matthew.vick@intel.com/

Add a conditional so only for 82580 we write into the TSICR register,
so we don't risk losing events for other models.

This (partially) reverts commit ee14cc9ea19b ("igb: Fix missing time sync events").

Fixes: ee14cc9ea19b ("igb: Fix missing time sync events")
Closes: https://lore.kernel.org/intel-wired-lan/CAN0jFd1kO0MMtOh8N2Ztxn6f7vvDKp2h507sMryobkBKe=xk=w@mail.gmail.com/
Tested-by: Daiwei Li <daiweili@...gle.com>
Signed-off-by: Daiwei Li <daiweili@...gle.com>
---

@Vinicius Gomes, this is my first time submitting a Linux kernel patch,
so apologies if I missed any part of the procedure (e.g. this is
currently on top of 6.7.12, the kernel I am running; should I be
rebasing on inline?). Also, is there any way to annotate the patch
to give you credit for the original change?

 drivers/net/ethernet/intel/igb/igb_main.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index ada42ba63549..1210ddc5d81e 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -6986,6 +6986,16 @@ static void igb_tsync_interrupt(struct igb_adapter *adapter)
 	struct e1000_hw *hw = &adapter->hw;
 	u32 tsicr = rd32(E1000_TSICR);
 	struct ptp_clock_event event;
+	const u32 mask = (TSINTR_SYS_WRAP | E1000_TSICR_TXTS |
+			  TSINTR_TT0 | TSINTR_TT1 |
+			  TSINTR_AUTT0 | TSINTR_AUTT1);
+
+	if (hw->mac.type == e1000_82580) {
+		/* 82580 has a hardware bug that requires a explicit
+		 * write to clear the TimeSync interrupt cause.
+		 */
+		wr32(E1000_TSICR, tsicr & mask);
+	}
 
 	if (tsicr & TSINTR_SYS_WRAP) {
 		event.type = PTP_CLOCK_PPS;
-- 
2.46.0.76.ge559c4bf1a-goog


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