[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240813202956.GF1922056@rocinante>
Date: Wed, 14 Aug 2024 05:29:56 +0900
From: Krzysztof WilczyĆski <kw@...ux.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: lpieralisi@...nel.org, robh@...nel.org, bhelgaas@...gle.com,
linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI: qcom-ep: Disable MHI RAM data parity error
interrupt for SA8775P SoC
Hello,
> SA8775P SoC has support for the hardware parity check feature on the MHI
> RAM (entity that holds MHI registers etc...). But due to a hardware bug in
> the parity check logic, the data parity error interrupt is getting
> generated all the time when using MHI. So the hardware team has suggested
> disabling the parity check error to workaround the hardware bug.
>
> So let's mask the parity error interrupt in PARF_INT_ALL_5_MASK register.
Applied to controller/qcom, thank you!
[1/1] PCI: qcom-ep: Disable MHI RAM data parity error interrupt for SA8775P SoC
https://git.kernel.org/pci/pci/c/6d27436b41d4
Krzysztof
Powered by blists - more mailing lists