lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <cd8ac2dd-e56d-4551-b3bf-6994c2064f1b@quicinc.com>
Date: Tue, 13 Aug 2024 20:07:28 +0800
From: Jie Luo <quic_luoj@...cinc.com>
To: Andrew Lunn <andrew@...n.ch>
CC: Krzysztof Kozlowski <krzk@...nel.org>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        "Stephen
 Boyd" <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Catalin Marinas
	<catalin.marinas@....com>,
        Will Deacon <will@...nel.org>, Konrad Dybcio
	<konradybcio@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <quic_kkumarcs@...cinc.com>,
        <quic_suruchia@...cinc.com>, <quic_pavir@...cinc.com>,
        <quic_linchen@...cinc.com>, <quic_leiwei@...cinc.com>
Subject: Re: [PATCH 3/4] arm64: defconfig: Enable Qualcomm IPQ common PLL
 clock controller



On 8/9/2024 9:34 PM, Andrew Lunn wrote:
> On Fri, Aug 09, 2024 at 07:36:35PM +0800, Jie Luo wrote:
>>
>>
>> On 8/8/2024 10:41 PM, Krzysztof Kozlowski wrote:
>>> On 08/08/2024 16:03, Luo Jie wrote:
>>>> The common PLL clock controller provides fixed rate output clocks to
>>>> the hardware blocks that enable ethernet function on IPQ platform.
>>>
>>> That's defconfig for all platforms, so how anyone can guess which one
>>> you target here? Be specific, which company, which Soc, which board
>>> needs it.
>>>
>>
>> Sure, I will update the commit message as below to provide the details
>> required.
>>
>> The common PLL hardware block is available in the Qualcomm IPQ SoC such
>> as IPQ9574 and IPQ5332. It provides fixed rate output clocks to Ethernet
>> related hardware blocks such as external Ethernet PHY or switch. This
>> driver is initially being enabled for IPQ9574. All boards based on
>> IPQ9574 SoC will require to include this driver in the build.
> 
> Does it provide more than Ethernet clocks? I'm just wondering why the
> name `common`, when it seems pretty uncommon, specialised for Ethernet
> clocks on a couple of SoCs.
> 
>     Andrew

No, this block does not provide any other functionality other than
allowing this PLL to be configured for supplying clocks to Ethernet
devices. The hardware programming guide names this block as the 'CMN'
block, so we included the 'cmn' phrase in the driver namespace. However,
I will update commit message to clarify that 'cmn' is the block name and
it does not provide any other function other than enabling clocks to
Ethernet related devices.



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ