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Message-ID: <87plqbnnyx.ffs@tglx>
Date: Wed, 14 Aug 2024 17:06:14 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Kevin Chen <kevin_chen@...eedtech.com>, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org, joel@....id.au,
 andrew@...econstruct.com.au, kevin_chen@...eedtech.com,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org
Subject: Re: [PATCH v2 2/2] irqchip/aspeed-intc: Add support for AST27XX INTC

On Wed, Aug 14 2024 at 19:41, Kevin Chen wrote:
> Support for the Aspeed Interrupt Controller found on Aspeed Silicon SoCs,
> such as the AST2700, which is arm64 architecture.
>
> To support ASPEED interrupt controller(INTC) maps the internal interrupt
> sources of the AST27XX device to an parent interrupt controller.

This still lacks a Signed-off-by: tag and my comment about the error
path in the init function is still valid.

Do you think that addressing review feedback is optional?

Feel free to ignore it, but don't be surprised if I ignore further
patches from you.

Take your time and go through stuff properly and do not rush out half
baked patches in a frenzy.

Thanks,

        tglx






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